19c8f11d92
As almost same pinmux nodes are repeated in each device dts,
let's define them once in the ipq8064 dtsi and remove the rest.
* uart0_pins : Did not touch.
* i2c4_pins : This node seems to be not used at all in dts.
Added the most common form in the dtsi. Did not touch rpm_pins.
* spi_pins : The common mux node is already present in the dtsi.
Removed the duplicate nodes from dts.
* nand_pins : Moved the entire node.
* mdio0_pins : Moved the common mux node.
* rgmii2_pins: Moved the common mux node. "pins" property is overrided in ap161.
Signed-off-by: Sungbo Eo <mans0n@gorani.run>
187 lines
2.6 KiB
Plaintext
187 lines
2.6 KiB
Plaintext
#include "qcom-ipq8064-v1.0.dtsi"
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/ {
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model = "Qualcomm IPQ8064/DB149";
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compatible = "qcom,ipq8064-db149", "qcom,ipq8064";
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reserved-memory {
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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rsvd@41200000 {
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reg = <0x41200000 0x300000>;
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no-map;
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};
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};
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alias {
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serial0 = &uart2;
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mdio-gpio0 = &mdio0;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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};
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};
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&qcom_pinmux {
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rgmii0_pins: rgmii0_pins {
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mux {
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pins = "gpio2", "gpio66";
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drive-strength = <8>;
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bias-disable;
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};
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};
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};
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&gsbi2 {
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qcom,mode = <GSBI_PROT_I2C_UART>;
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status = "okay";
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uart2: serial@12490000 {
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status = "okay";
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};
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};
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&gsbi5 {
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qcom,mode = <GSBI_PROT_SPI>;
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status = "okay";
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spi4: spi@1a280000 {
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status = "okay";
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spi-max-frequency = <50000000>;
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pinctrl-0 = <&spi_pins>;
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pinctrl-names = "default";
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cs-gpios = <&qcom_pinmux 20 0>;
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m25p80@0 {
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compatible = "s25fl256s1";
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#address-cells = <1>;
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#size-cells = <1>;
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spi-max-frequency = <50000000>;
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reg = <0>;
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m25p,fast-read;
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partition@0 {
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label = "lowlevel_init";
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reg = <0x0 0x1b0000>;
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};
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partition@1 {
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label = "u-boot";
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reg = <0x1b0000 0x80000>;
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};
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partition@2 {
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label = "u-boot-env";
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reg = <0x230000 0x40000>;
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};
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partition@3 {
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label = "caldata";
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reg = <0x270000 0x40000>;
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};
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partition@4 {
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label = "firmware";
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reg = <0x2b0000 0x1d50000>;
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};
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};
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};
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};
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&sata_phy {
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status = "okay";
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};
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&sata {
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status = "okay";
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};
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&usb3_0 {
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status = "okay";
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};
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&usb3_1 {
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status = "okay";
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};
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&pcie0 {
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status = "okay";
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};
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&pcie1 {
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status = "okay";
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};
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&pcie2 {
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status = "okay";
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};
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&mdio0 {
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status = "okay";
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pinctrl-0 = <&mdio0_pins>;
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pinctrl-names = "default";
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phy0: ethernet-phy@0 {
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reg = <0>;
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qca,ar8327-initvals = <
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0x00004 0x7600000 /* PAD0_MODE */
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0x00008 0x1000000 /* PAD5_MODE */
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0x0000c 0x80 /* PAD6_MODE */
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0x000e4 0x6a545 /* MAC_POWER_SEL */
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0x000e0 0xc74164de /* SGMII_CTRL */
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0x0007c 0x4e /* PORT0_STATUS */
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0x00094 0x4e /* PORT6_STATUS */
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>;
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};
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phy4: ethernet-phy@4 {
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reg = <4>;
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};
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phy6: ethernet-phy@6 {
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reg = <6>;
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};
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phy7: ethernet-phy@7 {
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reg = <7>;
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};
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};
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&gmac0 {
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status = "okay";
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phy-mode = "rgmii";
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qcom,id = <0>;
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phy-handle = <&phy4>;
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pinctrl-0 = <&rgmii0_pins>;
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pinctrl-names = "default";
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};
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&gmac1 {
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status = "okay";
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phy-mode = "sgmii";
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qcom,id = <1>;
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fixed-link {
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speed = <1000>;
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full-duplex;
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};
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};
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&gmac2 {
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status = "okay";
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phy-mode = "sgmii";
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qcom,id = <2>;
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phy-handle = <&phy6>;
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};
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&gmac3 {
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status = "okay";
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phy-mode = "sgmii";
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qcom,id = <3>;
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phy-handle = <&phy7>;
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}; |