748682e855
Changelog: https://cdn.kernel.org/pub/linux/kernel/v6.x/ChangeLog-6.6.83 Removed upstreamed: bcm27xx/patches-6.6/950-0483-usb-xhci-borrow-upstream-TRB_FETCH-quirk-on-VL805-ho.patch[1] Manually rebased: bcm27xx/patches-6.6/950-0061-Revert-Revert-xhci-add-quirk-for-host-controllers-th.patch bcm27xx/patches-6.6/950-0485-usb-xhci-add-XHCI_VLI_HUB_TT_QUIRK.patch bcm27xx/patches-6.6/950-0519-usb-dwc3-Set-DMA-and-coherent-masks-early.patch All other patches automatically rebased. 1. https://web.git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/drivers/usb/host/xhci-pci.c?h=linux-6.6.y&id=c401b1b4b835d66792e884b76264d742a20d931d Build system: x86/64 Build-tested: x86/64 Run-tested: x86/64 Signed-off-by: John Audia <therealgraysky@proton.me> [fixed issues with bcm27xx patches] Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
76 lines
2.5 KiB
Diff
76 lines
2.5 KiB
Diff
From 6cc2d4ccd77509df74b7b8ef46bbc6ba0a571318 Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= <arinc.unal@arinc9.com>
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Date: Mon, 22 Apr 2024 10:15:16 +0300
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Subject: [PATCH 09/15] net: dsa: mt7530: define MAC speed capabilities per
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switch model
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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With the support of the MT7988 SoC switch, the MAC speed capabilities
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defined on mt753x_phylink_get_caps() won't apply to all switch models
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anymore. Move them to more appropriate locations instead of overwriting
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config->mac_capabilities.
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Remove the comment on mt753x_phylink_get_caps() as it's become invalid with
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the support of MT7531 and MT7988 SoC switch.
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Add break to case 6 of mt7988_mac_port_get_caps() to be explicit.
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Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
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---
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drivers/net/dsa/mt7530.c | 15 ++++++++++-----
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1 file changed, 10 insertions(+), 5 deletions(-)
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--- a/drivers/net/dsa/mt7530.c
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+++ b/drivers/net/dsa/mt7530.c
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@@ -2681,6 +2681,8 @@ mt7531_setup(struct dsa_switch *ds)
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static void mt7530_mac_port_get_caps(struct dsa_switch *ds, int port,
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struct phylink_config *config)
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{
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+ config->mac_capabilities |= MAC_10 | MAC_100 | MAC_1000FD;
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+
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switch (port) {
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/* Ports which are connected to switch PHYs. There is no MII pinout. */
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case 0 ... 4:
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@@ -2712,6 +2714,8 @@ static void mt7531_mac_port_get_caps(str
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{
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struct mt7530_priv *priv = ds->priv;
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+ config->mac_capabilities |= MAC_10 | MAC_100 | MAC_1000FD;
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+
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switch (port) {
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/* Ports which are connected to switch PHYs. There is no MII pinout. */
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case 0 ... 4:
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@@ -2751,14 +2755,17 @@ static void mt7988_mac_port_get_caps(str
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case 0 ... 3:
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__set_bit(PHY_INTERFACE_MODE_INTERNAL,
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config->supported_interfaces);
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+
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+ config->mac_capabilities |= MAC_10 | MAC_100 | MAC_1000FD;
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break;
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/* Port 6 is connected to SoC's XGMII MAC. There is no MII pinout. */
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case 6:
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__set_bit(PHY_INTERFACE_MODE_INTERNAL,
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config->supported_interfaces);
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- config->mac_capabilities = MAC_ASYM_PAUSE | MAC_SYM_PAUSE |
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- MAC_10000FD;
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+
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+ config->mac_capabilities |= MAC_10000FD;
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+ break;
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}
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}
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@@ -2928,9 +2935,7 @@ static void mt753x_phylink_get_caps(stru
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{
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struct mt7530_priv *priv = ds->priv;
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- /* This switch only supports full-duplex at 1Gbps */
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- config->mac_capabilities = MAC_ASYM_PAUSE | MAC_SYM_PAUSE |
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- MAC_10 | MAC_100 | MAC_1000FD;
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+ config->mac_capabilities = MAC_ASYM_PAUSE | MAC_SYM_PAUSE;
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priv->info->mac_port_get_caps(ds, port, config);
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}
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