1036545b00
Assigns the correct mac address from nvmen to the wlan interfaces.
This Mac address corresponds to the label "Wireless MAC" on the device
and the stock firmware.
Removes duplicate entry of calibration variant for both radios.
Fixes: cfc13c44595d ("ipq40xx: utilize nvmem-cells for macs & (pre-)calibration data")
Reviewed-by: Robert Marko <robimarko@gmail.com>
Signed-off-by: Bjoern Dobe <bjoern@dobecom.de>
473 lines
8.1 KiB
Plaintext
473 lines
8.1 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-only OR MIT
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#include "qcom-ipq4019.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/soc/qcom,tcsr.h>
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/ {
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model = "Aruba AP-303H";
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compatible = "aruba,ap-303h";
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aliases {
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led-boot = &led_system_green;
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led-failsafe = &led_system_red;
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led-running = &led_system_green;
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led-upgrade = &led_system_amber;
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};
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memory {
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device_type = "memory";
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reg = <0x80000000 0x10000000>;
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};
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soc {
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rng@22000 {
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status = "okay";
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};
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mdio@90000 {
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status = "okay";
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pinctrl-0 = <&mdio_pins>;
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pinctrl-names = "default";
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reset-gpios = <&tlmm 19 GPIO_ACTIVE_LOW>;
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reset-delay-us = <2000>;
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};
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counter@4a1000 {
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compatible = "qcom,qca-gcnt";
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reg = <0x4a1000 0x4>;
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};
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ess_tcsr@1953000 {
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compatible = "qcom,tcsr";
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reg = <0x1953000 0x1000>;
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qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
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};
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tcsr@1949000 {
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compatible = "qcom,tcsr";
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reg = <0x1949000 0x100>;
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qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
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};
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tcsr@194b000 {
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compatible = "qcom,tcsr";
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reg = <0x194b000 0x100>;
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qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
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};
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tcsr@1957000 {
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compatible = "qcom,tcsr";
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reg = <0x1957000 0x100>;
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qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
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};
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usb2@60f8800 {
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status = "okay";
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};
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crypto@8e3a000 {
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status = "okay";
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};
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watchdog@b017000 {
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status = "okay";
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};
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i2c_0: i2c@78b7000 {
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pinctrl-0 = <&i2c_0_pins>;
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pinctrl-names = "default";
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status = "okay";
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tpm@29 {
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/* No Driver */
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compatible = "atmel,at97sc3203";
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reg = <0x29>;
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read-only;
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};
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power-monitor@40 {
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/* No driver */
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compatible = "isl,isl28022";
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reg = <0x40>;
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};
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};
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};
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leds {
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compatible = "gpio-leds";
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wifi_green {
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label = "green:wifi";
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gpios = <&tlmm 27 GPIO_ACTIVE_HIGH>;
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linux,default-trigger = "phy0tpt";
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};
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wifi_amber {
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label = "amber:wifi";
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gpios = <&tlmm 28 GPIO_ACTIVE_HIGH>;
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linux,default-trigger = "phy1tpt";
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};
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pse {
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label = "green:pse";
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gpios = <&tlmm 42 GPIO_ACTIVE_HIGH>;
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};
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led_system_red: system_red {
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label = "red:system";
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gpios = <&tlmm 25 GPIO_ACTIVE_HIGH>;
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};
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led_system_green: system_green {
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label = "green:system";
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gpios = <&tlmm 24 GPIO_ACTIVE_HIGH>;
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};
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led_system_amber: system_amber {
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label = "amber:system";
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gpios = <&tlmm 26 GPIO_ACTIVE_HIGH>;
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};
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};
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keys {
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compatible = "gpio-keys";
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reset {
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label = "Reset button";
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gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_RESTART>;
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};
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};
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};
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&blsp_dma {
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status = "okay";
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};
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&blsp1_uart1 {
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pinctrl-0 = <&serial_0_pins>;
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pinctrl-names = "default";
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status = "okay";
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};
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&blsp1_uart2 {
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/* Texas Instruments CC2540T BLE radio */
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pinctrl-0 = <&serial_1_pins>;
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pinctrl-names = "default";
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status = "okay";
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};
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&cryptobam {
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status = "okay";
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};
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&qpic_bam {
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status = "okay";
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};
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&tlmm {
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/*
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* In addition to the Pins listed below,
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* the following GPIOs have "features":
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* 39 - out - active low to force HW reset
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* 32 - out - active low to reset TPM
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* 43 - out - active low to reset BLE radio
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* 41 - out - pulse to set warm reset status
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* 34 - out - active low to enable PSE port
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* 22 - in - active low when 802.3at powered
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* 29 - in - active high when DC powered
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* 40 - in - active low when reset due to cold HW reset
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* 30 - in - active low when USB overcurrent detected
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* 35 - in - interrupt line for power monitor chip
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* 31 - in - active low when PSE port active
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*/
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mdio_pins: mdio_pinmux {
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mux_1 {
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pins = "gpio6";
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function = "mdio";
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bias-pull-up;
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};
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mux_2 {
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pins = "gpio7";
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function = "mdc";
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bias-pull-up;
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};
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};
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spi_0_pins: spi_0_pinmux {
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pin {
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function = "blsp_spi0";
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pins = "gpio13", "gpio14", "gpio15";
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drive-strength = <12>;
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bias-disable;
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};
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pin_cs {
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function = "gpio";
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pins = "gpio12", "gpio59";
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drive-strength = <2>;
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bias-disable;
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output-high;
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};
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};
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i2c_0_pins: i2c_0_pinmux {
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mux {
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pins = "gpio20", "gpio21";
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function = "blsp_i2c0";
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drive-strength = <4>;
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bias-disable;
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};
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};
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serial_0_pins: serial_0_pinmux {
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mux {
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pins = "gpio16", "gpio17";
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function = "blsp_uart0";
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bias-disable;
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};
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};
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serial_1_pins: serial_1_pinmux {
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mux {
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pins = "gpio8", "gpio9";
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function = "blsp_uart1";
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bias-disable;
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};
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};
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usb-power {
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line-name = "USB-power";
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gpios = <23 GPIO_ACTIVE_HIGH>;
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gpio-hog;
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output-high;
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};
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};
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&blsp1_spi1 {
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pinctrl-0 = <&spi_0_pins>;
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pinctrl-names = "default";
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status = "okay";
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cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>, <&tlmm 59 GPIO_ACTIVE_HIGH>;
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flash@0 {
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compatible = "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <24000000>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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/*
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* There is no partition map for the NOR flash
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* in the stock firmware.
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*
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* All partitions here are based on offsets
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* found in the U-Boot GPL code and information
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* from smem.
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*/
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partition@0 {
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label = "sbl1";
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reg = <0x0 0x40000>;
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read-only;
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};
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partition@40000 {
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label = "mibib";
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reg = <0x40000 0x20000>;
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read-only;
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};
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partition@60000 {
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label = "qsee";
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reg = <0x60000 0x60000>;
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read-only;
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};
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partition@c0000 {
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label = "cdt";
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reg = <0xc0000 0x10000>;
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read-only;
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};
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partition@d0000 {
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label = "ddrparams";
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reg = <0xd0000 0x10000>;
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read-only;
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};
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partition@e0000 {
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label = "appsblenv";
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reg = <0xe0000 0x10000>;
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read-only;
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};
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partition@f0000 {
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label = "appsbl";
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reg = <0xf0000 0x100000>;
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read-only;
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};
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partition@1e0000 {
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label = "ART";
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reg = <0x1f0000 0x10000>;
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read-only;
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compatible = "nvmem-cells";
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#address-cells = <1>;
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#size-cells = <1>;
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precal_art_1000: precal@1000 {
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reg = <0x1000 0x2f20>;
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};
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precal_art_5000: precal@5000 {
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reg = <0x5000 0x2f20>;
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};
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};
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partition@1f0000 {
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label = "osss";
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reg = <0x200000 0x170000>;
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read-only;
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};
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partition@200000 {
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label = "pds";
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reg = <0x370000 0x10000>;
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read-only;
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};
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partition@380000 {
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label = "apcd";
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reg = <0x380000 0x10000>;
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read-only;
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};
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partition@390000 {
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label = "mfginfo";
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reg = <0x390000 0x10000>;
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read-only;
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compatible = "nvmem-cells";
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#address-cells = <1>;
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#size-cells = <1>;
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macaddr_mfginfo_1d: macaddr@1d {
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reg = <0x1d 0x6>;
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};
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macaddr_mfginfo_45: macaddr@45 {
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reg = <0x45 0x6>;
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};
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};
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partition@3a0000 {
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label = "fcache";
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reg = <0x3a0000 0x10000>;
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read-only;
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};
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partition@3b0000 {
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/* Called osss1 in smem */
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label = "u-boot-env-bak";
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reg = <0x3b0000 0x10000>;
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read-only;
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};
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partition@3f0000 {
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label = "u-boot-env";
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reg = <0x3c0000 0x40000>;
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read-only;
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};
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};
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};
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flash@1 {
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status = "okay";
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compatible = "spi-nand";
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reg = <1>;
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spi-max-frequency = <24000000>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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/* 'aos0' in Aruba firmware */
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label = "aos0";
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reg = <0x0 0x2000000>;
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read-only;
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};
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partition@2000000 {
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/* 'aos1' in Aruba firmware */
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label = "ubi";
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reg = <0x2000000 0x2000000>;
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};
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partition@4000000 {
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label = "aruba-ubifs";
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reg = <0x4000000 0x4000000>;
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read-only;
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};
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};
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};
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};
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&usb2_hs_phy {
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status = "okay";
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};
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&gmac {
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status = "okay";
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};
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&switch {
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status = "okay";
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};
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&swport2 {
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status = "okay";
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label = "lan1";
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};
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&swport3 {
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status = "okay";
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label = "lan2";
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};
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&swport4 {
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status = "okay";
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label = "lan3";
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};
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&swport5 {
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status = "okay";
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label = "wan";
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};
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&wifi0 {
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status = "okay";
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nvmem-cell-names = "pre-calibration", "mac-address";
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nvmem-cells = <&precal_art_1000>, <&macaddr_mfginfo_45>;
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qcom,ath10k-calibration-variant = "Aruba-AP-303";
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};
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&wifi1 {
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status = "okay";
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nvmem-cell-names = "pre-calibration", "mac-address";
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nvmem-cells = <&precal_art_5000>, <&macaddr_mfginfo_45>;
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mac-address-increment = <1>;
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qcom,ath10k-calibration-variant = "Aruba-AP-303";
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};
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