Manually rebased: bcm27xx/patches-5.15/950-0421-Support-RPi-DPI-interface-in-mode6-for-18-bit-color.patch bcm27xx/patches-5.15/950-0706-media-i2c-imx219-Scale-the-pixel-clock-rate-for-the-.patch ramips/patches-5.15/810-uvc-add-iPassion-iP2970-support.patch Removed upstreamed: bcm27xx/patches-5.15/950-0707-drm-vc4-For-DPI-MEDIA_BUS_FMT_RGB565_1X16-is-mode-1-.patch[1] bcm27xx/patches-5.15/950-0596-drm-vc4-dpi-Add-option-for-inverting-pixel-clock-and.patch[2] ipq807x/0006-v5.16-arm64-dts-qcom-Fix-IPQ8074-PCIe-PHY-nodes.patch [3] ipq807x/0034-v6.1-arm64-dts-qcom-ipq8074-fix-PCIe-PHY-serdes-size.patch [4] ipq807x/0103-arm64-dts-qcom-ipq8074-fix-Gen2-PCIe-QMP-PHY.patch [5] ipq807x/0104-arm64-dts-qcom-ipq8074-fix-Gen3-PCIe-QMP-PHY.patch [6] ipq807x/0105-arm64-dts-qcom-ipq8074-correct-Gen2-PCIe-ranges.patch [7] ipq807x/0108-arm64-dts-qcom-ipq8074-fix-Gen3-PCIe-node.patch [8] ipq807x/0109-arm64-dts-qcom-ipq8074-correct-PCIe-QMP-PHY-output-c.patch [9] ipq807x/0132-arm64-dts-qcom-ipq8074-correct-USB3-QMP-PHY-s-clock-.patch [10] All other patches automatically rebased. 1. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v5.15.99&id=d2991e6b30020e286f2dd9d3b4f43548c547caa6 2. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/drivers/gpu/drm/vc4/vc4_dpi.c?h=v5.15.100&id=8e04aaffb6de5f1ae61de7b671c1531172ccf429 3. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/arch/arm64/boot/dts/qcom/ipq8074.dtsi?h=v5.15.99&id=a55a645aa303a3f7ec37db69822d5420657626da 4. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/arch/arm64/boot/dts/qcom/ipq8074.dtsi?h=v5.15.99&id=d9df682bcea57fa25f37bbf17eae56fa05662635 5. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/arch/arm64/boot/dts/qcom/ipq8074.dtsi?h=v5.15.99&id=7e6eeb5fb3aa9e5feffdb6e137dcc06f5f6410e1 6. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/arch/arm64/boot/dts/qcom/ipq8074.dtsi?h=v5.15.99&id=e88204931d9a60634cd50bbc679f045439c4b91d 7. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/arch/arm64/boot/dts/qcom/ipq8074.dtsi?h=v5.15.99&id=1563af0f28afd3b6d64ac79a2aecced3969c90bf 8. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/arch/arm64/boot/dts/qcom/ipq8074.dtsi?h=v5.15.99&id=feb8c71f015d416f1afe90e1f62cf51e47376c67 9. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/arch/arm64/boot/dts/qcom/ipq8074.dtsi?h=v5.15.99&id=69c7a270357a7d50ffd3471b14c60250041200e3 10. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/arch/arm64/boot/dts/qcom/ipq8074.dtsi?h=v5.15.99&id=dd3d021ae5471d98adf81f1e897431c8657d0a18 Build system: x86_64 Build-tested: bcm2711/RPi4B, ramips/tplink_archer-a6-v3 Run-tested: bcm2711/RPi4B, ramips/tplink_archer-a6-v3 Signed-off-by: John Audia <therealgraysky@proton.me> Tested-by: Robert Marko <robimarko@gmail.com> #ipq807x/Dynalink WRX36 Tested-by: Stefan Lippers-Hollmann <s.l-h@gmx.de> #ipq807x/ax3600, x86_64/FW-7543B, ath79/tl-wdr3600, ipq806x/g10, ipq806x/nbg6817
217 lines
6.5 KiB
Diff
217 lines
6.5 KiB
Diff
From fd317c55c0a5d9f8950b49d1efe32166a378cb26 Mon Sep 17 00:00:00 2001
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From: Dave Stevenson <dave.stevenson@raspberrypi.com>
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Date: Wed, 15 Dec 2021 10:17:38 +0100
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Subject: [PATCH] drm/vc4: plane: Add support for DRM_FORMAT_P030
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The P030 format, used with the DRM_FORMAT_MOD_BROADCOM_SAND128 modifier,
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is a format output by the video decoder on the BCM2711.
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Add native support to the KMS planes for that format.
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Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
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Signed-off-by: Maxime Ripard <maxime@cerno.tech>
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Acked-by: Thomas Zimmermann <tzimmermann@suse.de>
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Link: https://lore.kernel.org/r/20211215091739.135042-3-maxime@cerno.tech
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---
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drivers/gpu/drm/vc4/vc4_plane.c | 127 ++++++++++++++++++++++++--------
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1 file changed, 96 insertions(+), 31 deletions(-)
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--- a/drivers/gpu/drm/vc4/vc4_plane.c
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+++ b/drivers/gpu/drm/vc4/vc4_plane.c
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@@ -33,6 +33,7 @@ static const struct hvs_format {
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u32 hvs; /* HVS_FORMAT_* */
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u32 pixel_order;
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u32 pixel_order_hvs5;
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+ bool hvs5_only;
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} hvs_formats[] = {
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{
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.drm = DRM_FORMAT_XRGB8888,
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@@ -130,6 +131,12 @@ static const struct hvs_format {
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.hvs = HVS_PIXEL_FORMAT_YCBCR_YUV422_2PLANE,
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.pixel_order = HVS_PIXEL_ORDER_XYCRCB,
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},
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+ {
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+ .drm = DRM_FORMAT_P030,
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+ .hvs = HVS_PIXEL_FORMAT_YCBCR_10BIT,
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+ .pixel_order = HVS_PIXEL_ORDER_XYCBCR,
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+ .hvs5_only = true,
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+ },
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};
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static const struct hvs_format *vc4_get_hvs_format(u32 drm_format)
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@@ -760,47 +767,90 @@ static int vc4_plane_mode_set(struct drm
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case DRM_FORMAT_MOD_BROADCOM_SAND128:
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case DRM_FORMAT_MOD_BROADCOM_SAND256: {
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uint32_t param = fourcc_mod_broadcom_param(fb->modifier);
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- u32 tile_w, tile, x_off, pix_per_tile;
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-
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- hvs_format = HVS_PIXEL_FORMAT_H264;
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-
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- switch (base_format_mod) {
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- case DRM_FORMAT_MOD_BROADCOM_SAND64:
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- tiling = SCALER_CTL0_TILING_64B;
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- tile_w = 64;
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- break;
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- case DRM_FORMAT_MOD_BROADCOM_SAND128:
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- tiling = SCALER_CTL0_TILING_128B;
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- tile_w = 128;
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- break;
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- case DRM_FORMAT_MOD_BROADCOM_SAND256:
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- tiling = SCALER_CTL0_TILING_256B_OR_T;
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- tile_w = 256;
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- break;
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- default:
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- break;
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- }
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if (param > SCALER_TILE_HEIGHT_MASK) {
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- DRM_DEBUG_KMS("SAND height too large (%d)\n", param);
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+ DRM_DEBUG_KMS("SAND height too large (%d)\n",
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+ param);
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return -EINVAL;
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}
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- pix_per_tile = tile_w / fb->format->cpp[0];
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- tile = vc4_state->src_x / pix_per_tile;
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- x_off = vc4_state->src_x % pix_per_tile;
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+ if (fb->format->format == DRM_FORMAT_P030) {
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+ hvs_format = HVS_PIXEL_FORMAT_YCBCR_10BIT;
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+ tiling = SCALER_CTL0_TILING_128B;
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+ } else {
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+ hvs_format = HVS_PIXEL_FORMAT_H264;
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+
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+ switch (base_format_mod) {
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+ case DRM_FORMAT_MOD_BROADCOM_SAND64:
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+ tiling = SCALER_CTL0_TILING_64B;
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+ break;
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+ case DRM_FORMAT_MOD_BROADCOM_SAND128:
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+ tiling = SCALER_CTL0_TILING_128B;
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+ break;
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+ case DRM_FORMAT_MOD_BROADCOM_SAND256:
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+ tiling = SCALER_CTL0_TILING_256B_OR_T;
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+ break;
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+ default:
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+ return -EINVAL;
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+ }
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+ }
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/* Adjust the base pointer to the first pixel to be scanned
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* out.
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+ *
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+ * For P030, y_ptr [31:4] is the 128bit word for the start pixel
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+ * y_ptr [3:0] is the pixel (0-11) contained within that 128bit
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+ * word that should be taken as the first pixel.
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+ * Ditto uv_ptr [31:4] vs [3:0], however [3:0] contains the
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+ * element within the 128bit word, eg for pixel 3 the value
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+ * should be 6.
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*/
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for (i = 0; i < num_planes; i++) {
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+ u32 tile_w, tile, x_off, pix_per_tile;
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+
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+ if (fb->format->format == DRM_FORMAT_P030) {
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+ /*
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+ * Spec says: bits [31:4] of the given address
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+ * should point to the 128-bit word containing
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+ * the desired starting pixel, and bits[3:0]
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+ * should be between 0 and 11, indicating which
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+ * of the 12-pixels in that 128-bit word is the
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+ * first pixel to be used
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+ */
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+ u32 remaining_pixels = vc4_state->src_x % 96;
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+ u32 aligned = remaining_pixels / 12;
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+ u32 last_bits = remaining_pixels % 12;
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+
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+ x_off = aligned * 16 + last_bits;
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+ tile_w = 128;
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+ pix_per_tile = 96;
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+ } else {
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+ switch (base_format_mod) {
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+ case DRM_FORMAT_MOD_BROADCOM_SAND64:
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+ tile_w = 64;
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+ break;
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+ case DRM_FORMAT_MOD_BROADCOM_SAND128:
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+ tile_w = 128;
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+ break;
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+ case DRM_FORMAT_MOD_BROADCOM_SAND256:
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+ tile_w = 256;
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+ break;
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+ default:
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+ return -EINVAL;
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+ }
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+ pix_per_tile = tile_w / fb->format->cpp[0];
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+ x_off = (vc4_state->src_x % pix_per_tile) /
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+ (i ? h_subsample : 1) *
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+ fb->format->cpp[i];
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+ }
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+
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+ tile = vc4_state->src_x / pix_per_tile;
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+
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vc4_state->offsets[i] += param * tile_w * tile;
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vc4_state->offsets[i] += src_y /
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(i ? v_subsample : 1) *
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tile_w;
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- vc4_state->offsets[i] += x_off /
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- (i ? h_subsample : 1) *
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- fb->format->cpp[i];
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+ vc4_state->offsets[i] += x_off & ~(i ? 1 : 0);
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}
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pitch0 = VC4_SET_FIELD(param, SCALER_TILE_HEIGHT);
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@@ -953,7 +1003,8 @@ static int vc4_plane_mode_set(struct drm
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/* Pitch word 1/2 */
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for (i = 1; i < num_planes; i++) {
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- if (hvs_format != HVS_PIXEL_FORMAT_H264) {
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+ if (hvs_format != HVS_PIXEL_FORMAT_H264 &&
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+ hvs_format != HVS_PIXEL_FORMAT_YCBCR_10BIT) {
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vc4_dlist_write(vc4_state,
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VC4_SET_FIELD(fb->pitches[i],
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SCALER_SRC_PITCH));
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@@ -1313,6 +1364,13 @@ static bool vc4_format_mod_supported(str
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default:
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return false;
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}
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+ case DRM_FORMAT_P030:
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+ switch (fourcc_mod_broadcom_mod(modifier)) {
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+ case DRM_FORMAT_MOD_BROADCOM_SAND128:
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+ return true;
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+ default:
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+ return false;
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+ }
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case DRM_FORMAT_RGBX1010102:
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case DRM_FORMAT_BGRX1010102:
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case DRM_FORMAT_RGBA1010102:
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@@ -1345,8 +1403,11 @@ struct drm_plane *vc4_plane_init(struct
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struct drm_plane *plane = NULL;
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struct vc4_plane *vc4_plane;
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u32 formats[ARRAY_SIZE(hvs_formats)];
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+ int num_formats = 0;
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int ret = 0;
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unsigned i;
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+ bool hvs5 = of_device_is_compatible(dev->dev->of_node,
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+ "brcm,bcm2711-vc5");
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static const uint64_t modifiers[] = {
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DRM_FORMAT_MOD_BROADCOM_VC4_T_TILED,
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DRM_FORMAT_MOD_BROADCOM_SAND128,
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@@ -1361,13 +1422,17 @@ struct drm_plane *vc4_plane_init(struct
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if (!vc4_plane)
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return ERR_PTR(-ENOMEM);
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- for (i = 0; i < ARRAY_SIZE(hvs_formats); i++)
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- formats[i] = hvs_formats[i].drm;
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+ for (i = 0; i < ARRAY_SIZE(hvs_formats); i++) {
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+ if (!hvs_formats[i].hvs5_only || hvs5) {
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+ formats[num_formats] = hvs_formats[i].drm;
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+ num_formats++;
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+ }
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+ }
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plane = &vc4_plane->base;
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ret = drm_universal_plane_init(dev, plane, 0,
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&vc4_plane_funcs,
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- formats, ARRAY_SIZE(formats),
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+ formats, num_formats,
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modifiers, type, NULL);
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if (ret)
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return ERR_PTR(ret);
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