openwrt-cghmn-mt300n/package/kernel/mac80211/patches/rt2x00/994-rt2x00-import-support-for-external-LNA-on-MT7620.patch
Daniel Golle 7c459ac1d5 mac80211: rt2x00: experimental improvements for MT7620 wifi
Serge Vasilugin reports:

To improve mt7620 built-in wifi performance some changes:
1. Correct BW20/BW40 switching (see comments with mark (1))
2. Correct TX_SW_CFG1 MAC reg from v3 of vendor driver see
	https://gitlab.com/dm38/padavan-ng/-/blob/master/trunk/proprietary/rt_wifi/rtpci/3.0.X.X/mt76x2/chips/rt6352.c#L531
3. Set bbp66 for all chains.
4. US_CYC_CNT init based on Programming guide, default value was 33 (pci),
   set chipset bus clock with fallback to cpu clock/3.
5. Don't overwrite default values for mt7620.
6. Correct some typos.
7. Add support for external LNA:
    a) RF and BBP regs never be corrected for this mode
    b) eLNA is driven the same way as ePA with mt7620's pin PA
	but vendor driver explicitly pin PA to gpio mode (for forrect calibration?)
	so I'm not sure that request for pa_pin in dts-file will be enough

First 5 changes (really 2) improve performance for boards w/o eLNA/ePA.
Changes 7 add support for eLNA

Configuration w/o eLAN/ePA and with eLNA show results
tx/rx (from router point of view) for each stream:
 35-40/30-35 Mbps for HT20
 65-70/60-65 Mbps for HT40

Yes. Max results for 2T2R client is 140-145/135-140
with peaks 160/150, It correspond to mediatek driver results.
Boards with ePA untested.

Reported-by: Serge Vasilugin <vasilugin@yandex.ru>
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
[directly include v3 of the patchset submitted upstream]
(cherry picked from commit 31a6605de04218e1c04bd5c2436c24d7d1c07506)
(cherry picked from commit e785ca05e9f0502894772f5df92192b816ba5d7c)
(cherry picked from commit 412fcf3d4400f84551f3ead0514834c62d94a251)
2022-09-19 02:48:26 +01:00

162 lines
5.4 KiB
Diff

From 0fce1109f894ec7fcd72cb098843a1eff786716a Mon Sep 17 00:00:00 2001
From: Daniel Golle <daniel@makrotopia.org>
Date: Fri, 16 Sep 2022 20:49:42 +0100
Subject: [PATCH 16/16] rt2x00: import support for external LNA on MT7620
To: linux-wireless@vger.kernel.org,
Stanislaw Gruszka <stf_xl@wp.pl>,
Helmut Schaa <helmut.schaa@googlemail.com>
Cc: Kalle Valo <kvalo@kernel.org>,
David S. Miller <davem@davemloft.net>,
Eric Dumazet <edumazet@google.com>,
Jakub Kicinski <kuba@kernel.org>,
Paolo Abeni <pabeni@redhat.com>,
Johannes Berg <johannes.berg@intel.com>
In order to carry out calibration on boards with ePA or eLNA the PA pin
needs to be switch to GPIO mode on MT7620. Implement that by selecting
pinctrl state "pa_gpio" which should be defined for MT7620 boards with
eLNA or ePA beside the "default" state.
Reported-by: Serge Vasilugin <vasilugin@yandex.ru>
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
---
.../net/wireless/ralink/rt2x00/rt2800lib.c | 58 +++++++++++++++++++
drivers/net/wireless/ralink/rt2x00/rt2x00.h | 5 ++
.../net/wireless/ralink/rt2x00/rt2x00soc.c | 15 +++++
3 files changed, 78 insertions(+)
--- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
+++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
@@ -304,6 +304,24 @@ static void rt2800_rf_write(struct rt2x0
mutex_unlock(&rt2x00dev->csr_mutex);
}
+void rt6352_enable_pa_pin(struct rt2x00_dev *rt2x00dev, int enable)
+{
+ if (!rt2x00dev->pinctrl)
+ return;
+
+ if (enable) {
+ if (!rt2x00dev->pins_default)
+ return;
+
+ pinctrl_select_state(rt2x00dev->pinctrl, rt2x00dev->pins_default);
+ } else {
+ if (!rt2x00dev->pins_pa_gpio)
+ return;
+
+ pinctrl_select_state(rt2x00dev->pinctrl, rt2x00dev->pins_pa_gpio);
+ }
+}
+
static const unsigned int rt2800_eeprom_map[EEPROM_WORD_COUNT] = {
[EEPROM_CHIP_ID] = 0x0000,
[EEPROM_VERSION] = 0x0001,
@@ -4469,6 +4487,29 @@ static void rt2800_config_channel(struct
rt2800_register_write(rt2x00dev, TX1_RF_GAIN_ATTEN,
0x6C6C6B6C);
}
+
+ if (rt2x00_has_cap_external_lna_bg(rt2x00dev)) {
+ reg = rt2800_register_read(rt2x00dev, RF_CONTROL3);
+ reg |= 0x00000101;
+ rt2800_register_write(rt2x00dev, RF_CONTROL3, reg);
+
+ reg = rt2800_register_read(rt2x00dev, RF_BYPASS3);
+ reg |= 0x00000101;
+ rt2800_register_write(rt2x00dev, RF_BYPASS3, reg);
+
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 14, 0x66);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 17, 0x20);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 18, 0x42);
+ rt2800_bbp_write(rt2x00dev, 75, 0x68);
+ rt2800_bbp_write(rt2x00dev, 76, 0x4C);
+ rt2800_bbp_write(rt2x00dev, 79, 0x1C);
+ rt2800_bbp_write(rt2x00dev, 80, 0x0C);
+ rt2800_bbp_write(rt2x00dev, 82, 0xB6);
+ /* bank 0 RF reg 42 and glrt BBP reg 141 will be set in
+ * config channel function in dependence of channel and
+ * HT20/HT40 so don't touch it
+ */
+ }
}
bbp = rt2800_bbp_read(rt2x00dev, 4);
@@ -10583,6 +10624,7 @@ static void rt2800_init_rfcsr_6352(struc
rt2800_rfcsr_write_dccal(rt2x00dev, 5, 0x00);
rt2800_rfcsr_write_dccal(rt2x00dev, 17, 0x7C);
+ rt6352_enable_pa_pin(rt2x00dev, 0);
rt2800_r_calibration(rt2x00dev);
rt2800_rf_self_txdc_cal(rt2x00dev);
rt2800_rxdcoc_calibration(rt2x00dev);
@@ -10590,6 +10632,22 @@ static void rt2800_init_rfcsr_6352(struc
rt2800_bw_filter_calibration(rt2x00dev, false);
rt2800_loft_iq_calibration(rt2x00dev);
rt2800_rxiq_calibration(rt2x00dev);
+ rt6352_enable_pa_pin(rt2x00dev, 1);
+
+ if (rt2x00_has_cap_external_lna_bg(rt2x00dev)) {
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 14, 0x66);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 17, 0x20);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 18, 0x42);
+ rt2800_bbp_write(rt2x00dev, 75, 0x68);
+ rt2800_bbp_write(rt2x00dev, 76, 0x4C);
+ rt2800_bbp_write(rt2x00dev, 79, 0x1C);
+ rt2800_bbp_write(rt2x00dev, 80, 0x0C);
+ rt2800_bbp_write(rt2x00dev, 82, 0xB6);
+ /* bank 0 RF reg 42 and glrt BBP reg 141 will be set in config
+ * channel function in dependence of channel and HT20/HT40,
+ * so don't touch them here.
+ */
+ }
}
static void rt2800_init_rfcsr(struct rt2x00_dev *rt2x00dev)
--- a/drivers/net/wireless/ralink/rt2x00/rt2x00.h
+++ b/drivers/net/wireless/ralink/rt2x00/rt2x00.h
@@ -28,6 +28,7 @@
#include <linux/average.h>
#include <linux/usb.h>
#include <linux/clk.h>
+#include <linux/pinctrl/consumer.h>
#include <linux/rt2x00_platform.h>
#include <net/mac80211.h>
@@ -1029,6 +1030,11 @@ struct rt2x00_dev {
/* Clock for System On Chip devices. */
struct clk *clk;
+
+ /* pinctrl and states for System On Chip devices with PA/LNA. */
+ struct pinctrl *pinctrl;
+ struct pinctrl_state *pins_default;
+ struct pinctrl_state *pins_pa_gpio;
};
struct rt2x00_bar_list_entry {
--- a/drivers/net/wireless/ralink/rt2x00/rt2x00soc.c
+++ b/drivers/net/wireless/ralink/rt2x00/rt2x00soc.c
@@ -97,6 +97,21 @@ int rt2x00soc_probe(struct platform_devi
if (retval)
goto exit_free_reg;
+ rt2x00dev->pinctrl = devm_pinctrl_get(&pdev->dev);
+ if (IS_ERR(rt2x00dev->pinctrl)) {
+ rt2x00dev->pinctrl = NULL;
+ rt2x00dev->pins_default = NULL;
+ rt2x00dev->pins_pa_gpio = NULL;
+ } else {
+ rt2x00dev->pins_default = pinctrl_lookup_state(rt2x00dev->pinctrl, "default");
+ if (IS_ERR(rt2x00dev->pins_default))
+ rt2x00dev->pins_default = NULL;
+
+ rt2x00dev->pins_pa_gpio = pinctrl_lookup_state(rt2x00dev->pinctrl, "pa_gpio");
+ if (IS_ERR(rt2x00dev->pins_pa_gpio))
+ rt2x00dev->pins_pa_gpio = NULL;
+ }
+
return 0;
exit_free_reg: