This patch adds support for Linksys WHW01 v1 ("Velop") [FCC ID Q87-03331]. Specification ------------- SOC: Qualcomm IPQ4018 WiFi 1: Qualcomm QCA4019 IEEE 802.11b/g/n WiFi 2: Qualcomm QCA4019 IEEE 802.11a/n/ac Bluetooth: Qualcomm CSR8811 (A12U) Ethernet: Qualcomm QCA8072 (2-port) SPI Flash 1: Mactronix MX25L1605D (2MB) SPI Flash 2: Winbond W25M02GV (256MB) DRAM: Nanya NT5CC128M16IP-DI (256MB) LED Controller: NXP PCA963x (I2C) Buttons: Single reset button (GPIO). Notes ----- There does not appear to be a way to trigger TFTP recovery without entering U-Boot. The device must be opened to access the serial console in order to first flash OpenWrt onto a device from factory. The device has automatic recovery backed by a second set of partitions on the larger of the two SPI flash ICs. Both the primary and secondary must be flashed to prevent accidental rollback to "factory" after 3 failed boot attempts. Serial console -------------- A serial console is available on the following pins of the populated J2 connector on the device mainboard (115200 8n1). (<-- Top of PCB / Device) J2 [o o o o o o] | | | | | `-- GND | `---- TX `--------- RX Installation instructions ------------------------- 1. Setup TFTP server with server IP set to 192.168.1.236. 2. Copy compiled `...squashfs-factory.bin` to `nodes-jr.img` in tftp root. 3. Connect to console using pinout detailed in the serial console section. 4. Power on device and press enter when prompted to drop into U-Boot. 5. Flash first partition device via `run flashimg`. 6. Once complete, reset device and allow to power up completely. 7. Once comfortable with device upgrade reboot and drop back into U-Boot. 8. Flash the second partition (recovery) via `run flashimg2`. Revert to "factory" ------------------- 1. Download latest firmware update from vendor support site. 2. Copy extracted `.img` file to `nodes-jr.img` in tftp root. 3. Connect to console using pinout detailed in the serial console section. 4. Power on device and press enter when prompted to drop into U-Boot. 5. Flash first partition device via `run flashimg`. 6. Once complete, reset device and allow to power up completely. 7. Once comfortable with device upgrade reboot and drop back into U-Boot. 8. Flash the second partition (recovery) via `run flashimg2`. Link: https://github.com/openwrt/openwrt/pull/3682 Signed-off-by: Peter Adkins <peter@sunkenlab.com> (calibration from nvmem, updated to 5.10+5.15) Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
331 lines
5.1 KiB
Plaintext
331 lines
5.1 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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#include "qcom-ipq4019.dtsi"
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#include <dt-bindings/leds/common.h>
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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/ {
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model = "Linksys WHW01 v1";
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compatible = "linksys,whw01-v1";
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aliases {
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serial0 = &blsp1_uart1;
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led-boot = &led_system_blue;
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led-running = &led_system_blue;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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bootargs-append = " root=/dev/ubiblock0_0";
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};
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soc {
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keys {
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compatible = "gpio-keys";
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reset {
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label = "reset";
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gpios = <&tlmm 63 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_RESTART>;
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};
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};
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ess-psgmii@98000 {
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status = "okay";
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};
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ess_tcsr@1953000 {
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status = "okay";
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};
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ess-switch@c000000 {
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status = "okay";
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};
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edma@c080000 {
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status = "okay";
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};
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};
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};
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&blsp_dma {
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status = "okay";
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};
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&blsp1_i2c3 {
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status = "okay";
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pinctrl-0 = <&i2c_0_pins>;
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pinctrl-1 = <&i2c_0_pins>;
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pinctrl-names = "i2c_active", "i2c_sleep";
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leds@62 {
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compatible = "nxp,pca9633";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x62>;
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/* RGB? */
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led@0 {
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reg = <0>;
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color = <LED_COLOR_ID_RED>;
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function = LED_FUNCTION_POWER;
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};
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led@1 {
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reg = <1>;
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color = <LED_COLOR_ID_GREEN>;
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function = LED_FUNCTION_POWER;
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};
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led_system_blue: led@2 {
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reg = <2>;
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color = <LED_COLOR_ID_BLUE>;
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function = LED_FUNCTION_POWER;
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linux,default-trigger = "default-on";
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};
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};
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};
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&blsp1_spi1 {
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status = "okay";
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pinctrl-0 = <&spi_0_pins>;
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pinctrl-names = "default";
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cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>, <&tlmm 4 GPIO_ACTIVE_HIGH>;
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nor@0 {
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reg = <0>;
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compatible = "jedec,spi-nor";
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spi-max-frequency = <24000000>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "0:SBL1";
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reg = <0x0 0x40000>;
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read-only;
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};
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partition@40000 {
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label = "0:MIBIB";
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reg = <0x40000 0x20000>;
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read-only;
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};
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partition@60000 {
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label = "0:QSEE";
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reg = <0x60000 0x60000>;
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read-only;
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};
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partition@c0000 {
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label = "0:CDT";
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reg = <0xc0000 0x10000>;
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read-only;
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};
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partition@d0000 {
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label = "APPSBL";
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reg = <0xd0000 0xa0000>;
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read-only;
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};
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partition@170000 {
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label = "0:ART";
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reg = <0x170000 0x10000>;
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read-only;
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compatible = "nvmem-cells";
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#address-cells = <1>;
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#size-cells = <1>;
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precal_art_1000: precal@1000 {
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reg = <0x1000 0x2f20>;
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};
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precal_art_5000: precal@5000 {
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reg = <0x5000 0x2f20>;
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};
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};
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partition@180000 {
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label = "u_env";
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reg = <0x180000 0x40000>;
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};
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partition@1c0000 {
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label = "s_env";
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reg = <0x1c0000 0x20000>;
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};
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partition@1e0000 {
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label = "devinfo";
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reg = <0x1e0000 0x20000>;
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read-only;
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};
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};
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};
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nand@1 {
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reg = <1>;
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compatible = "spi-nand";
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spi-max-frequency = <24000000>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "kernel";
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reg = <0x0000000 0x5000000>;
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};
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partition@600000 {
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label = "rootfs";
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reg = <0x0600000 0x4a00000>;
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};
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partition@5000000 {
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label = "alt_kernel";
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reg = <0x5000000 0x5000000>;
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};
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partition@5600000 {
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label = "alt_rootfs";
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reg = <0x5600000 0x4a00000>;
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};
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partition@a000000 {
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label = "sysdiag";
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reg = <0xa000000 0x0200000>;
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read-only;
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};
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partition@a200000 {
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label = "syscfg";
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reg = <0xa200000 0x5e00000>;
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read-only;
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};
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};
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};
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};
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&blsp1_uart1 {
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pinctrl-0 = <&serial_pins>;
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pinctrl-names = "default";
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status = "okay";
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};
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&mdio {
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status = "okay";
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pinctrl-0 = <&mdio_pins>;
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pinctrl-names = "default";
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phy-reset-gpio = <&tlmm 62 GPIO_ACTIVE_HIGH>;
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};
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&tlmm {
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mdio_pins: mdio_pinmux {
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mux_mdio {
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pins = "gpio53";
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function = "mdio";
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bias-pull-up;
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};
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mux_mdc {
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pins = "gpio52";
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function = "mdc";
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bias-pull-up;
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};
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};
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serial_pins: serial_pinmux {
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mux {
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pins = "gpio60", "gpio61";
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function = "blsp_uart0";
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bias-disable;
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};
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};
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spi_0_pins: spi_0_pinmux {
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pinmux {
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function = "blsp_spi0";
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pins = "gpio55", "gpio56", "gpio57";
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};
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pinmux_cs {
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function = "gpio";
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pins = "gpio54", "gpio4";
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};
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pinconf {
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pins = "gpio55", "gpio56", "gpio57";
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drive-strength = <12>;
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bias-disable;
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};
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pinconf_cs {
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pins = "gpio54", "gpio4";
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drive-strength = <2>;
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bias-disable;
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output-high;
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};
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};
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i2c_0_pins: i2c_0_pinmux {
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mux {
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function = "blsp_i2c0";
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pins = "gpio58", "gpio59";
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bias-disable;
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};
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};
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reset_pinmux {
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mux {
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pins = "gpio63";
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bias-pull-up;
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};
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};
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};
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&usb2 {
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status = "okay";
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};
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&usb2_hs_phy {
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status = "okay";
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};
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&usb3 {
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status = "okay";
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};
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&usb3_hs_phy {
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status = "okay";
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};
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&usb3_ss_phy {
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status = "okay";
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};
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&watchdog {
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status = "okay";
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};
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&wifi0 {
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status = "okay";
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qcom,ath10k-calibration-variant = "linksys-whw01-v1";
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nvmem-cell-names = "pre-calibration";
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nvmem-cells = <&precal_art_1000>;
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};
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&wifi1 {
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status = "okay";
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qcom,ath10k-calibration-variant = "linksys-whw01-v1";
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nvmem-cell-names = "pre-calibration";
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nvmem-cells = <&precal_art_5000>;
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};
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