5efd41c10b
Changelog: https://cdn.kernel.org/pub/linux/kernel/v6.x/ChangeLog-6.6.28 Removed upstream: pending-6.6/796-net-dsa-mt7530-trap-link-local-frames-regardless-of-.patch All oither patches automatically rebased. 1. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.6.28&id=8b6c4b62582606c62074a7e7c64156f56d2785f2 Build system: x86/64 Build-tested: x86/64/AMD Cezanne, flogic/xiaomi_redmi-router-ax6000-ubootmod, ramips/tplink_archer-a6-v3 Run-tested: x86/64/AMD Cezanne, flogic/xiaomi_redmi-router-ax6000-ubootmod, ramips/tplink_archer-a6-v3 Signed-off-by: John Audia <therealgraysky@proton.me>
155 lines
5.7 KiB
Diff
155 lines
5.7 KiB
Diff
From b9547109205c5e0a27e5bed568b0fc183fff906b Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= <arinc.unal@arinc9.com>
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Date: Thu, 14 Mar 2024 12:28:35 +0300
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Subject: [PATCH 30/30] net: dsa: mt7530: prevent possible incorrect XTAL
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frequency selection
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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On MT7530, the HT_XTAL_FSEL field of the HWTRAP register stores a 2-bit
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value that represents the frequency of the crystal oscillator connected to
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the switch IC. The field is populated by the state of the ESW_P4_LED_0 and
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ESW_P4_LED_0 pins, which is done right after reset is deasserted.
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ESW_P4_LED_0 ESW_P3_LED_0 Frequency
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-----------------------------------------
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0 0 Reserved
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0 1 20MHz
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1 0 40MHz
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1 1 25MHz
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On MT7531, the XTAL25 bit of the STRAP register stores this. The LAN0LED0
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pin is used to populate the bit. 25MHz when the pin is high, 40MHz when
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it's low.
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These pins are also used with LEDs, therefore, their state can be set to
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something other than the bootstrapping configuration. For example, a link
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may be established on port 3 before the DSA subdriver takes control of the
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switch which would set ESW_P3_LED_0 to high.
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Currently on mt7530_setup() and mt7531_setup(), 1000 - 1100 usec delay is
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described between reset assertion and deassertion. Some switch ICs in real
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life conditions cannot always have these pins set back to the bootstrapping
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configuration before reset deassertion in this amount of delay. This causes
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wrong crystal frequency to be selected which puts the switch in a
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nonfunctional state after reset deassertion.
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The tests below are conducted on an MT7530 with a 40MHz crystal oscillator
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by Justin Swartz.
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With a cable from an active peer connected to port 3 before reset, an
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incorrect crystal frequency (0b11 = 25MHz) is selected:
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[1] [3] [5]
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: : :
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_____________________________ __________________
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ESW_P4_LED_0 |_______|
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_____________________________
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ESW_P3_LED_0 |__________________________
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: : : :
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: : [4]...:
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: :
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[2]................:
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[1] Reset is asserted.
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[2] Period of 1000 - 1100 usec.
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[3] Reset is deasserted.
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[4] Period of 315 usec. HWTRAP register is populated with incorrect
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XTAL frequency.
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[5] Signals reflect the bootstrapped configuration.
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Increase the delay between reset_control_assert() and
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reset_control_deassert(), and gpiod_set_value_cansleep(priv->reset, 0) and
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gpiod_set_value_cansleep(priv->reset, 1) to 5000 - 5100 usec. This amount
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ensures a higher possibility that the switch IC will have these pins back
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to the bootstrapping configuration before reset deassertion.
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With a cable from an active peer connected to port 3 before reset, the
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correct crystal frequency (0b10 = 40MHz) is selected:
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[1] [2-1] [3] [5]
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: : : :
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_____________________________ __________________
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ESW_P4_LED_0 |_______|
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___________________ _______
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ESW_P3_LED_0 |_________| |__________________
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: : : : :
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: [2-2]...: [4]...:
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[2]................:
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[1] Reset is asserted.
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[2] Period of 5000 - 5100 usec.
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[2-1] ESW_P3_LED_0 goes low.
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[2-2] Remaining period of 5000 - 5100 usec.
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[3] Reset is deasserted.
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[4] Period of 310 usec. HWTRAP register is populated with bootstrapped
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XTAL frequency.
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[5] Signals reflect the bootstrapped configuration.
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ESW_P3_LED_0 low period before reset deassertion:
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5000 usec
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- 5100 usec
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TEST RESET HOLD
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# (usec)
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---------------------
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1 5410
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2 5440
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3 4375
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4 5490
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5 5475
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6 4335
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7 4370
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8 5435
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9 4205
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10 4335
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11 3750
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12 3170
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13 4395
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14 4375
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15 3515
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16 4335
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17 4220
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18 4175
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19 4175
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20 4350
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Min 3170
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Max 5490
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Median 4342.500
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Avg 4466.500
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Revert commit 2920dd92b980 ("net: dsa: mt7530: disable LEDs before reset").
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Changing the state of pins via reset assertion is simpler and more
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efficient than doing so by setting the LED controller off.
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Fixes: b8f126a8d543 ("net-next: dsa: add dsa support for Mediatek MT7530 switch")
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Fixes: c288575f7810 ("net: dsa: mt7530: Add the support of MT7531 switch")
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Co-developed-by: Justin Swartz <justin.swartz@risingedge.co.za>
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Signed-off-by: Justin Swartz <justin.swartz@risingedge.co.za>
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Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
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Signed-off-by: David S. Miller <davem@davemloft.net>
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---
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drivers/net/dsa/mt7530.c | 6 ------
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1 file changed, 6 deletions(-)
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--- a/drivers/net/dsa/mt7530.c
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+++ b/drivers/net/dsa/mt7530.c
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@@ -2389,12 +2389,6 @@ mt7530_setup(struct dsa_switch *ds)
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}
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}
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- /* Disable LEDs before reset to prevent the MT7530 sampling a
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- * potentially incorrect HT_XTAL_FSEL value.
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- */
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- mt7530_write(priv, MT7530_LED_EN, 0);
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- usleep_range(1000, 1100);
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-
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/* Reset whole chip through gpio pin or memory-mapped registers for
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* different type of hardware
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*/
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