34d9172655
Introduce support for the Qualcomm IPQ50xx SoC. This series adds support for the following components: - minimal boot support: GCC/pinctrl/watchdog/CPUFreq/SDI (upstreamed) - USB2 (upstreamed) - Thermal/Tsens - PCIe gen2 1&2-lane PHY and controller - PWM and PWM LED - QPIC SPI NAND controller - CMN PLL Block (provider of fixed rate clocks to GCC/ethernet/more.) - Ethernet: IPQ5018 Internal GE PHY (1 gbps) - Remoteproc MPD driver for IPQ5018 (2.4G) & QCN6122 (5/6G) Wifi Co-developed-by: Ziyang Huang <hzyitc@outlook.com> Signed-off-by: Ziyang Huang <hzyitc@outlook.com> Signed-off-by: George Moussalem <george.moussalem@outlook.com> Link: https://github.com/openwrt/openwrt/pull/17182 Signed-off-by: Robert Marko <robimarko@gmail.com>
23 lines
596 B
Diff
23 lines
596 B
Diff
From: George Moussalem <george.moussalem@outlook.com>
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Date: Wed, 05 Feb 2025 12:12:47 +0400
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Subject: [PATCH] arm64: dts: qcom: ipq5018: add tz_apps reserved memory region
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Add tz_apps memory region needed for wifi to work.
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Signed-off-by: George Moussalem <george.moussalem@outlook.com>
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---
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--- a/arch/arm64/boot/dts/qcom/ipq5018.dtsi
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+++ b/arch/arm64/boot/dts/qcom/ipq5018.dtsi
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@@ -113,6 +113,11 @@
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#size-cells = <2>;
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ranges;
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+ tz_apps@4a400000 {
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+ reg = <0x0 0x4a400000 0x0 0x400000>;
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+ no-map;
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+ };
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+
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bootloader@4a800000 {
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reg = <0x0 0x4a800000 0x0 0x200000>;
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no-map;
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