34d9172655
Introduce support for the Qualcomm IPQ50xx SoC. This series adds support for the following components: - minimal boot support: GCC/pinctrl/watchdog/CPUFreq/SDI (upstreamed) - USB2 (upstreamed) - Thermal/Tsens - PCIe gen2 1&2-lane PHY and controller - PWM and PWM LED - QPIC SPI NAND controller - CMN PLL Block (provider of fixed rate clocks to GCC/ethernet/more.) - Ethernet: IPQ5018 Internal GE PHY (1 gbps) - Remoteproc MPD driver for IPQ5018 (2.4G) & QCN6122 (5/6G) Wifi Co-developed-by: Ziyang Huang <hzyitc@outlook.com> Signed-off-by: Ziyang Huang <hzyitc@outlook.com> Signed-off-by: George Moussalem <george.moussalem@outlook.com> Link: https://github.com/openwrt/openwrt/pull/17182 Signed-off-by: Robert Marko <robimarko@gmail.com>
50 lines
1.4 KiB
Diff
50 lines
1.4 KiB
Diff
From 8a56ac86c2eed13024413aa23a6cda85613d60f9 Mon Sep 17 00:00:00 2001
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From: Ziyang Huang <hzyitc@outlook.com>
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Date: Sat, 18 Jan 2025 16:18:40 +0800
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Subject: [PATCH 1/2] net: dsa: qca8k: support PHY-to-PHY CPU link
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PHY-to-PHY CPU link is a common/demo design in IPQ50xx platform, since it only has a SGMII/SGMII+ link and a MDI link.
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For DSA, CPU tag is the only requirement. Fortunately, qca8337 can enable it on any port. So it's ok to trust a PHY-to-PHY link as a CPU link.
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Signed-off-by: Ziyang Huang <hzyitc@outlook.com>
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---
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drivers/net/dsa/qca/qca8k-8xxx.c | 12 +++++++-----
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1 file changed, 7 insertions(+), 5 deletions(-)
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--- a/drivers/net/dsa/qca/qca8k-8xxx.c
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+++ b/drivers/net/dsa/qca/qca8k-8xxx.c
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@@ -1013,7 +1013,7 @@ qca8k_setup_mdio_bus(struct qca8k_priv *
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return err;
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}
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- if (!dsa_is_user_port(priv->ds, reg))
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+ if (reg == 0 || reg == 6)
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continue;
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of_get_phy_mode(port, &mode);
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@@ -1088,17 +1088,19 @@ qca8k_setup_mac_pwr_sel(struct qca8k_pri
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static int qca8k_find_cpu_port(struct dsa_switch *ds)
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{
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- struct qca8k_priv *priv = ds->priv;
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+ int i;
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- /* Find the connected cpu port. Valid port are 0 or 6 */
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if (dsa_is_cpu_port(ds, 0))
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return 0;
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- dev_dbg(priv->dev, "port 0 is not the CPU port. Checking port 6");
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-
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if (dsa_is_cpu_port(ds, 6))
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return 6;
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+ /* PHY-to-PHY link */
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+ for (i = 1; i <= 5; i++)
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+ if (dsa_is_cpu_port(ds, i))
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+ return i;
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+
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return -EINVAL;
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}
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