34d9172655
Introduce support for the Qualcomm IPQ50xx SoC. This series adds support for the following components: - minimal boot support: GCC/pinctrl/watchdog/CPUFreq/SDI (upstreamed) - USB2 (upstreamed) - Thermal/Tsens - PCIe gen2 1&2-lane PHY and controller - PWM and PWM LED - QPIC SPI NAND controller - CMN PLL Block (provider of fixed rate clocks to GCC/ethernet/more.) - Ethernet: IPQ5018 Internal GE PHY (1 gbps) - Remoteproc MPD driver for IPQ5018 (2.4G) & QCN6122 (5/6G) Wifi Co-developed-by: Ziyang Huang <hzyitc@outlook.com> Signed-off-by: Ziyang Huang <hzyitc@outlook.com> Signed-off-by: George Moussalem <george.moussalem@outlook.com> Link: https://github.com/openwrt/openwrt/pull/17182 Signed-off-by: Robert Marko <robimarko@gmail.com>
36 lines
1.2 KiB
Diff
36 lines
1.2 KiB
Diff
From f71366e0530db2c5cecbbbb6edfbf7344bd6f83b Mon Sep 17 00:00:00 2001
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From: Ziyang Huang <hzyitc@outlook.com>
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Date: Sun, 8 Sep 2024 16:40:12 +0800
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Subject: [PATCH 1/2] clk: gcc-ipq5018: remove the unsupported clk
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combination for gmac
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Comment out the unsupported clock combination in the frequency table
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for GMAC1.
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Signed-off-by: Ziyang Huang <hzyitc@outlook.com>
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Signed-off-by: George Moussalem <george.moussalem@outlook.com>
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---
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drivers/clk/qcom/gcc-ipq5018.c | 4 ++--
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1 file changed, 2 insertions(+), 2 deletions(-)
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--- a/drivers/clk/qcom/gcc-ipq5018.c
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+++ b/drivers/clk/qcom/gcc-ipq5018.c
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@@ -677,7 +677,7 @@ static const struct freq_tbl ftbl_gmac1_
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F(2500000, P_UNIPHY_RX, 12.5, 0, 0),
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F(24000000, P_XO, 1, 0, 0),
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F(25000000, P_UNIPHY_RX, 2.5, 0, 0),
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- F(125000000, P_UNIPHY_RX, 2.5, 0, 0),
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+ /* F(125000000, P_UNIPHY_RX, 2.5, 0, 0), */
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F(125000000, P_UNIPHY_RX, 1, 0, 0),
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F(312500000, P_UNIPHY_RX, 1, 0, 0),
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{ }
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@@ -717,7 +717,7 @@ static const struct freq_tbl ftbl_gmac1_
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F(2500000, P_UNIPHY_TX, 12.5, 0, 0),
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F(24000000, P_XO, 1, 0, 0),
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F(25000000, P_UNIPHY_TX, 2.5, 0, 0),
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- F(125000000, P_UNIPHY_TX, 2.5, 0, 0),
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+ /* F(125000000, P_UNIPHY_TX, 2.5, 0, 0), */
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F(125000000, P_UNIPHY_TX, 1, 0, 0),
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F(312500000, P_UNIPHY_TX, 1, 0, 0),
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{ }
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