2fab942ce1
Fix Silicon Labs bindings in the spidev driver Some bindings for Silicon Labs chips already exists upstream. These bindings can be found in trivial-devices.yaml. The existing bindings are using "silabs" instead of "siliconlabs" to identify the manufacturer. This commit add two submitted patches for silabs chips and rename the manufacturer in the different DTS for more coherence. Signed-off-by: Vincent Tremblay <vincent@vtremblay.dev>
387 lines
6.4 KiB
Plaintext
387 lines
6.4 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-only OR MIT
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#include "qcom-ipq4019.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/soc/qcom,tcsr.h>
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/ {
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model = "GL.iNet GL-B2200";
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compatible = "glinet,gl-b2200", "qcom,ipq4019";
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memory {
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device_type = "memory";
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reg = <0x80000000 0x10000000>;
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};
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chosen {
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bootargs-append = " root=/dev/mmcblk0p2 rw rootwait clk_ignore_unused";
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};
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aliases {
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ethernet1 = &swport4;
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};
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soc {
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rng@22000 {
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status = "okay";
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};
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mdio@90000 {
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status = "okay";
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};
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tcsr@1949000 {
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compatible = "qcom,tcsr";
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reg = <0x1949000 0x100>;
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qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
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};
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tcsr@194b000 {
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/* select hostmode */
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compatible = "qcom,tcsr";
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reg = <0x194b000 0x100>;
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qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
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status = "okay";
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};
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ess_tcsr@1953000 {
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compatible = "qcom,tcsr";
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reg = <0x1953000 0x1000>;
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qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
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};
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tcsr@1957000 {
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compatible = "qcom,tcsr";
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reg = <0x1957000 0x100>;
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qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
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};
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crypto@8e3a000 {
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status = "okay";
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};
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};
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keys {
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compatible = "gpio-keys";
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wps {
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label = "wps";
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gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_WPS_BUTTON>;
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linux,input-type = <1>;
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};
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reset {
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label = "reset";
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gpios = <&tlmm 40 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_RESTART>;
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linux,input-type = <1>;
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};
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};
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leds {
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compatible = "gpio-leds";
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power_blue {
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label = "blue:power";
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gpios = <&tlmm 57 GPIO_ACTIVE_HIGH>;
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default-state = "on";
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};
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internet_blue {
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label = "blue:internet";
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gpios = <&tlmm 60 GPIO_ACTIVE_HIGH>;
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};
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power_white {
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label = "white:power";
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gpios = <&tlmm 61 GPIO_ACTIVE_LOW>;
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};
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internet_white {
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label = "white:internet";
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gpios = <&tlmm 66 GPIO_ACTIVE_LOW>;
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};
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};
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};
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&vqmmc {
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status = "okay";
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};
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&sdhci {
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status = "okay";
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pinctrl-0 = <&sd_pins>;
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pinctrl-names = "default";
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cd-gpios = <&tlmm 3 GPIO_ACTIVE_LOW>;
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vqmmc-supply = <&vqmmc>;
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};
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&blsp_dma {
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status = "okay";
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};
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&cryptobam {
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status = "okay";
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};
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&blsp1_spi1 {
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pinctrl-0 = <&spi_0_pins>;
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pinctrl-names = "default";
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status = "okay";
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cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>;
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flash@0 {
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compatible = "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <24000000>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "SBL1";
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reg = <0x0 0x40000>;
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read-only;
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};
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partition@40000 {
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label = "MIBIB";
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reg = <0x40000 0x20000>;
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read-only;
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};
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partition@60000 {
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label = "QSEE";
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reg = <0x60000 0x60000>;
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read-only;
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};
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partition@c0000 {
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label = "CDT";
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reg = <0xc0000 0x10000>;
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read-only;
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};
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partition@d0000 {
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label = "DDRPARAMS";
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reg = <0xd0000 0x10000>;
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read-only;
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};
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partition@e0000 {
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label = "APPSBLENV";
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reg = <0xe0000 0x10000>;
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read-only;
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};
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partition@f0000 {
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label = "APPSBL";
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reg = <0xf0000 0x80000>;
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read-only;
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};
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partition@170000 {
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label = "ART";
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reg = <0x170000 0x10000>;
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read-only;
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compatible = "nvmem-cells";
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#address-cells = <1>;
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#size-cells = <1>;
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precal_art_1000: precal@1000 {
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reg = <0x1000 0x2f20>;
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};
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precal_art_5000: precal@5000 {
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reg = <0x5000 0x2f20>;
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};
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precal_art_9000: precal@9000 {
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reg = <0x9000 0x2f20>;
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};
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};
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};
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};
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};
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&blsp1_spi2 {
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pinctrl-0 = <&spi_1_pins>;
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pinctrl-names = "default";
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status = "okay";
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spidev1: spi@0 {
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compatible = "silabs,si3210";
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reg = <0>;
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spi-max-frequency = <24000000>;
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};
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};
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&blsp1_uart1 {
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pinctrl-0 = <&serial_pins>;
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pinctrl-names = "default";
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status = "okay";
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};
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&blsp1_uart2 {
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pinctrl-0 = <&serial_1_pins>;
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pinctrl-names = "default";
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status = "okay";
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};
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&tlmm {
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serial_pins: serial_pinmux {
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mux {
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pins = "gpio16", "gpio17";
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function = "blsp_uart0";
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bias-disable;
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};
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};
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serial_1_pins: serial1_pinmux {
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mux {
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pins = "gpio8", "gpio9",
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"gpio10", "gpio11";
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function = "blsp_uart1";
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bias-disable;
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};
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};
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spi_0_pins: spi_0_pinmux {
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pinmux {
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function = "blsp_spi0";
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pins = "gpio13", "gpio14", "gpio15";
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};
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pinmux_cs {
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function = "gpio";
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pins = "gpio12";
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};
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pinconf {
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pins = "gpio13", "gpio14", "gpio15";
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drive-strength = <12>;
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bias-disable;
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};
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pinconf_cs {
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pins = "gpio12";
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drive-strength = <2>;
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bias-disable;
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output-high;
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};
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};
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spi_1_pins: spi_1_pinmux {
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mux {
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pins = "gpio44", "gpio46", "gpio47";
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function = "blsp_spi1";
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bias-disable;
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};
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cs {
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pins = "gpio45";
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function = "gpio";
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bias-pull-up;
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};
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reset {
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pins = "gpio43";
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function = "gpio";
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output-high;
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};
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mux_2 {
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pins = "gpio35";
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function = "gpio";
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output-high;
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};
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host_int {
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pins = "gpio2";
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function = "gpio";
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input;
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};
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wake {
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pins = "gpio48";
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function = "gpio";
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output-high;
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};
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};
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sd_pins: sd_pins {
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pinmux {
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function = "sdio";
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pins = "gpio23", "gpio24", "gpio25", "gpio26",
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"gpio29", "gpio30", "gpio31", "gpio32";
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drive-strength = <10>;
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};
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pinmux_sd_clk {
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function = "sdio";
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pins = "gpio27";
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drive-strength = <16>;
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};
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pinmux_sd7 {
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function = "sdio";
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pins = "gpio28";
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drive-strength = <10>;
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bias-disable;
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};
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};
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};
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&pcie0 {
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status = "okay";
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perst-gpio = <&tlmm 38 GPIO_ACTIVE_LOW>;
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wake-gpio = <&tlmm 50 GPIO_ACTIVE_LOW>;
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bridge@0,0 {
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reg = <0x00000000 0 0 0 0>;
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#address-cells = <3>;
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#size-cells = <2>;
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ranges;
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wifi2: wifi@1,0 {
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status = "okay";
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/* Bootlog shows this is a 168c:0056 - QCA 9888v2 */
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compatible = "qcom,ath10k";
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reg = <0x00010000 0 0 0 0>;
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nvmem-cell-names = "pre-calibration";
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nvmem-cells = <&precal_art_9000>;
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qcom,ath10k-calibration-variant = "GL-B2200";
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ieee80211-freq-limit = <5450000 5900000>;
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};
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};
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};
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&gmac {
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status = "okay";
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};
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&switch {
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status = "okay";
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};
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&swport4 {
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status = "okay";
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label = "wan";
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};
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&swport5 {
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status = "okay";
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label = "lan";
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};
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&wifi0 {
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status = "okay";
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nvmem-cell-names = "pre-calibration";
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nvmem-cells = <&precal_art_1000>;
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qcom,ath10k-calibration-variant = "GL-B2200";
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};
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&wifi1 {
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status = "okay";
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nvmem-cell-names = "pre-calibration";
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nvmem-cells = <&precal_art_5000>;
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qcom,ath10k-calibration-variant = "GL-B2200";
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ieee80211-freq-limit = <5100000 5400000>;
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};
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