openwrt-cghmn-mt300n/target/linux/bcm27xx/patches-6.6/950-1554-dt-bindings-gpu-v3d-Add-SMS-to-the-registers-list.patch
Álvaro Fernández Rojas 251f76c1c6 bcm27xx: pull 6.6 patches from RPi repo
Adds latest 6.6 patches from the Raspberry Pi repository.

These patches were generated from:
https://github.com/raspberrypi/linux/commits/rpi-6.6.y/
With the following command:
git format-patch -N v6.6.83..HEAD
(HEAD -> 08d4e8f52256bd422d8a1f876411603f627d0a82)

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2025-03-16 08:04:48 +01:00

44 lines
1.6 KiB
Diff

From 08e99bc475ad907f3087e4f14c2ddb6560514da1 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Ma=C3=ADra=20Canal?= <mcanal@igalia.com>
Date: Sat, 22 Feb 2025 15:26:39 -0300
Subject: [PATCH] dt-bindings: gpu: v3d: Add SMS to the registers' list
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
V3D 7.1 exposes a new register block, called V3D_SMS. As BCM2712 has a
V3D 7.1 core, add a new register item to the list. Similar to the GCA
and bridge register, SMS is optional and should only be added for V3D
7.1 variants.
Cc: Krzysztof Kozlowski <krzk+dt@kernel.org>
Cc: Conor Dooley <conor+dt@kernel.org>
Cc: Nicolas Saenz Julienne <nsaenz@kernel.org>
Cc: devicetree@vger.kernel.org
Signed-off-by: Maíra Canal <mcanal@igalia.com>
---
Documentation/devicetree/bindings/gpu/brcm,bcm-v3d.yaml | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
--- a/Documentation/devicetree/bindings/gpu/brcm,bcm-v3d.yaml
+++ b/Documentation/devicetree/bindings/gpu/brcm,bcm-v3d.yaml
@@ -27,14 +27,16 @@ properties:
- description: core0 register (required)
- description: GCA cache controller register (if GCA controller present)
- description: bridge register (if no external reset controller)
+ - description: SMS register (if SMS controller present)
minItems: 2
reg-names:
items:
- const: hub
- const: core0
- - enum: [ bridge, gca ]
- - enum: [ bridge, gca ]
+ - enum: [ bridge, gca, sms ]
+ - enum: [ bridge, gca, sms ]
+ - enum: [ bridge, gca, sms ]
minItems: 2
interrupts: