251f76c1c6
Adds latest 6.6 patches from the Raspberry Pi repository. These patches were generated from: https://github.com/raspberrypi/linux/commits/rpi-6.6.y/ With the following command: git format-patch -N v6.6.83..HEAD (HEAD -> 08d4e8f52256bd422d8a1f876411603f627d0a82) Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
44 lines
1.3 KiB
Diff
44 lines
1.3 KiB
Diff
From 602be52637ecca0b247cf832c8a4ec345844d325 Mon Sep 17 00:00:00 2001
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From: Phil Elwell <phil@raspberrypi.com>
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Date: Tue, 7 Jan 2025 12:09:48 +0000
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Subject: [PATCH] dts: bcm2712: PL011 UARTs are actually r1p5
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The ARM PL011 UART instances in BCM2712 are r1p5 spec, which means they
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have 32-entry FIFOs. The correct periphid value for this is 0x00341011.
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Thanks to N Buchwitz for pointing this out.
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Signed-off-by: Phil Elwell <phil@raspberrypi.com>
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---
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arch/arm64/boot/dts/broadcom/bcm2712.dtsi | 6 +++---
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1 file changed, 3 insertions(+), 3 deletions(-)
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--- a/arch/arm64/boot/dts/broadcom/bcm2712.dtsi
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+++ b/arch/arm64/boot/dts/broadcom/bcm2712.dtsi
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@@ -190,7 +190,7 @@
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clocks = <&clk_uart>,
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<&clk_vpu>;
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clock-names = "uartclk", "apb_pclk";
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- arm,primecell-periphid = <0x00241011>;
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+ arm,primecell-periphid = <0x00341011>;
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status = "disabled";
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};
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@@ -201,7 +201,7 @@
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clocks = <&clk_uart>,
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<&clk_vpu>;
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clock-names = "uartclk", "apb_pclk";
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- arm,primecell-periphid = <0x00241011>;
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+ arm,primecell-periphid = <0x00341011>;
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status = "disabled";
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};
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@@ -212,7 +212,7 @@
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clocks = <&clk_uart>,
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<&clk_vpu>;
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clock-names = "uartclk", "apb_pclk";
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- arm,primecell-periphid = <0x00241011>;
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+ arm,primecell-periphid = <0x00341011>;
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status = "disabled";
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};
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