/*
 * TP-Link TL-WDR4900 v1 Device Tree Source
 *
 * Copyright 2013 Gabor Juhos <juhosg@openwrt.org>
 *
 * This program is free software; you can redistribute  it and/or modify it
 * under  the terms of  the GNU General  Public License as published by the
 * Free Software Foundation;  either version 2 of the  License, or (at your
 * option) any later version.
 */

#include <dt-bindings/leds/common.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/gpio/gpio.h>

/include/ "fsl/p1010si-pre.dtsi"

/ {
	model = "TP-Link TL-WDR4900 v1";
	compatible = "tplink,tl-wdr4900-v1";

	chosen {
		bootargs = "console=ttyS0,115200";
/*
		stdout-path = "/soc@ffe00000/serial@4500";
*/
	};

	aliases {
		spi0 = &spi0;
		led-boot = &system_green;
		led-failsafe = &system_green;
		led-running = &system_green;
		led-upgrade = &system_green;
		label-mac-device = &enet0;
	};

	memory {
		device_type = "memory";
	};

	soc: soc@ffe00000 {
		ranges = <0x0 0x0 0xffe00000 0x100000>;

		spi0: spi@7000 {
			flash@0 {
				compatible = "jedec,spi-nor";
				reg = <0>;
				spi-max-frequency = <25000000>;

				partitions {
					compatible = "fixed-partitions";
					#address-cells = <1>;
					#size-cells = <1>;

					uboot: partition@0 {
						reg = <0x0 0x0050000>;
						label = "u-boot";
						read-only;

						nvmem-layout {
							compatible = "fixed-layout";
							#address-cells = <1>;
							#size-cells = <1>;

							macaddr_uboot_4fc00: macaddr@4fc00 {
								compatible = "mac-base";
								reg = <0x4fc00 0x6>;
								#nvmem-cell-cells = <1>;
							};
						};
					};

					partition@50000 {
						reg = <0x00050000 0x00010000>;
						label = "dtb";
						read-only;
					};

					partition@60000 {
						compatible = "tplink,firmware";
						reg = <0x00060000 0x00f80000>;
						label = "firmware";
					};

					partition@fe0000 {
						reg = <0x00fe0000 0x00010000>;
						label = "config";
						read-only;
					};

					partition@ff0000 {
						reg = <0x00ff0000 0x00010000>;
						label = "caldata";
						read-only;

						nvmem-layout {
							compatible = "fixed-layout";
							#address-cells = <1>;
							#size-cells = <1>;

							cal_caldata_1000: calibration@1000 {
								reg = <0x1000 0x440>;
							};

							cal_caldata_5000: calibration@5000 {
								reg = <0x5000 0x440>;
							};
						};
					};
				};
			};
		};

		gpio0: gpio-controller@fc00 {
		};

		usb@22000 {
			phy_type = "utmi";
			dr_mode = "host";

			port@1 {
				#address-cells = <1>;
				#size-cells = <0>;
				reg = <1>;
				#trigger-source-cells = <0>;

				hub_port1: port@1 {
					reg = <1>;
					#trigger-source-cells = <0>;
				};

				hub_port2: port@2 {
					reg = <2>;
					#trigger-source-cells = <0>;
				};
			};
		};

		mdio@24000 {

			phy_port1: phy@0 {
				reg = <0>;
			};

			phy_port2: phy@1 {
				reg = <1>;
			};

			phy_port3: phy@2 {
				reg = <2>;
			};

			phy_port4: phy@3 {
				reg = <3>;
			};

			phy_port5: phy@4 {
				reg = <4>;
			};

			switch@10 {
				compatible = "qca,qca8327";
				reg = <0x10>;

				ports {
					#address-cells = <1>;
					#size-cells = <0>;

					port@0 {
						reg = <0>;
						ethernet = <&enet0>;
						phy-mode = "rgmii-id";

						fixed-link {
							speed = <1000>;
							full-duplex;
						};
					};

					port@1 {
						reg = <1>;
						label = "wan";
						phy-handle = <&phy_port1>;

						nvmem-cells = <&macaddr_uboot_4fc00 1>;
						nvmem-cell-names = "mac-address";

						leds {
							#address-cells = <1>;
							#size-cells = <0>;

							led@0 {
								reg = <0>;
								color = <LED_COLOR_ID_GREEN>;
								function = LED_FUNCTION_WAN;
								default-state = "keep";
							};
						};
					};

					port@2 {
						reg = <2>;
						label = "lan1";
						phy-handle = <&phy_port2>;

						leds {
							#address-cells = <1>;
							#size-cells = <0>;

							led@0 {
								reg = <0>;
								color = <LED_COLOR_ID_GREEN>;
								function = LED_FUNCTION_LAN;
								default-state = "keep";
							};
						};
					};

					port@3 {
						reg = <3>;
						label = "lan2";
						phy-handle = <&phy_port3>;

						leds {
							#address-cells = <1>;
							#size-cells = <0>;

							led@0 {
								reg = <0>;
								color = <LED_COLOR_ID_GREEN>;
								function = LED_FUNCTION_LAN;
								default-state = "keep";
							};
						};
					};

					port@4 {
						reg = <4>;
						label = "lan3";
						phy-handle = <&phy_port4>;

						leds {
							#address-cells = <1>;
							#size-cells = <0>;

							led@0 {
								reg = <0>;
								color = <LED_COLOR_ID_GREEN>;
								function = LED_FUNCTION_LAN;
								default-state = "keep";
							};
						};
					};

					port@5 {
						reg = <5>;
						label = "lan4";
						phy-handle = <&phy_port5>;

						leds {
							#address-cells = <1>;
							#size-cells = <0>;

							led@0 {
								reg = <0>;
								color = <LED_COLOR_ID_GREEN>;
								function = LED_FUNCTION_LAN;
								default-state = "keep";
							};
						};
					};
				};
			};
		};

		mdio@25000 {
			status = "disabled";
		};

		mdio@26000 {
			status = "disabled";
		};

		enet0: ethernet@b0000 {
			phy-connection-type = "rgmii-id";
			nvmem-cells = <&macaddr_uboot_4fc00 0>;
			nvmem-cell-names = "mac-address";

			fixed-link {
				speed = <1000>;
				full-duplex;
			};
		};

		enet1: ethernet@b1000 {
			status = "disabled";
		};

		enet2: ethernet@b2000 {
			status = "disabled";
		};

		sdhc@2e000 {
			status = "disabled";
		};

		serial1: serial@4600 {
			status = "disabled";
		};

		can0: can@1c000 {
			status = "disabled";
		};

		can1: can@1d000 {
			status = "disabled";
		};

		ptp_clock@b0e00 {
			compatible = "fsl,etsec-ptp";
			reg = <0xb0e00 0xb0>;
			interrupts = <68 2 0 0 69 2 0 0 70 2 0 0>;
			fsl,cksel       = <1>;
			fsl,tclk-period	= <5>;
			fsl,tmr-prsc	= <2>;
			fsl,tmr-add	= <0xcccccccd>;
			fsl,tmr-fiper1	= <0x3b9ac9fb>; /* 1PPS */
			fsl,tmr-fiper2	= <0x00018696>;
			fsl,max-adj	= <249999999>;
		};
	};

	pci0: pcie@ffe09000 {
		reg = <0 0xffe09000 0 0x1000>;
		ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
			  0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
		pcie@0 {
			ranges = <0x2000000 0x0 0xa0000000
				  0x2000000 0x0 0xa0000000
				  0x0 0x20000000

				  0x1000000 0x0 0x0
				  0x1000000 0x0 0x0
				  0x0 0x100000>;

			ath9k: wifi@0,0 {
				compatible = "pci168c,0033";
				reg = <0x0000 0 0 0 0>;
				#gpio-cells = <2>;
				gpio-controller;
				qca,led-pin = /bits/ 8 <0>;
				nvmem-cells = <&cal_caldata_1000>, <&macaddr_uboot_4fc00 0>;
				nvmem-cell-names = "calibration", "mac-address";
			};
		};
	};

	pci1: pcie@ffe0a000 {
		reg = <0 0xffe0a000 0 0x1000>;
		ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
			  0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
		pcie@0 {
			ranges = <0x2000000 0x0 0x80000000
				  0x2000000 0x0 0x80000000
				  0x0 0x20000000

				  0x1000000 0x0 0x0
				  0x1000000 0x0 0x0
				  0x0 0x100000>;

			wifi@0,0 {
				compatible = "pci168c,0030";
				reg = <0x0000 0 0 0 0>;
				/*
				* The PCI header of the AR9381 chip is not programmed
				* correctly by the bootloader and the device uses wrong
				* data due to that. Replace the broken values with the
				* correct ones.
				*/
				device-id = <0x0030>;
				class-code = <0x028000>;
				qca,led-pin = /bits/ 8 <0>;
				nvmem-cells = <&cal_caldata_5000>, <&macaddr_uboot_4fc00 (-1)>;
				nvmem-cell-names = "calibration", "mac-address";
			};
		};
	};

	ifc: ifc@ffe1e000 {
		status = "disabled";
	};

	leds {
		compatible = "gpio-leds";

		led-0 {
			gpios = <&ath9k 1 GPIO_ACTIVE_LOW>;
			color = <LED_COLOR_ID_GREEN>;
			function = LED_FUNCTION_WPS;
		};

		system_green: led-1 {
			gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
			color = <LED_COLOR_ID_GREEN>;
			function = LED_FUNCTION_STATUS;
		};

		led-2 {
			gpios = <&gpio0 3 GPIO_ACTIVE_LOW>;
			color = <LED_COLOR_ID_GREEN>;
			function = LED_FUNCTION_USB;
			function-enumerator = <1>;
			linux,default-trigger = "usbport";
			trigger-sources = <&hub_port1>;
		};

		led-3 {
			gpios = <&gpio0 4 GPIO_ACTIVE_LOW>;
			color = <LED_COLOR_ID_GREEN>;
			function = LED_FUNCTION_USB;
			function-enumerator = <2>;
			linux,default-trigger = "usbport";
			trigger-sources = <&hub_port2>;
		};
	};

	gpio_export {
			compatible = "gpio-export";
			#size-cells = <0>;

			usb-pwr {
				gpio-export,name = "usb_pwr";
				gpio-export,output = <1>;
				gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
			};
		};

	buttons {
		compatible = "gpio-keys";

		reset {
			label = "Reset button";
			gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
			linux,code = <KEY_RESTART>;
		};

		rfkill {
			label = "RFKILL switch";
			gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
			linux,code = <KEY_RFKILL>;
		};
	};
};

/include/ "fsl/p1010si-post.dtsi"

/ {
	cpus {
		PowerPC,P1010@0 {
			bus-frequency = <399999996>;
			timebase-frequency = <49999999>;
			clock-frequency = <799999992>;
		};
	};

	memory {
		reg = <0x0 0x0 0x0 0x8000000>;
	};

	soc@ffe00000 {
		bus-frequency = <399999996>;

		serial@4600 {
			clock-frequency = <399999996>;
		};

		serial@4500 {
			clock-frequency = <399999996>;
		};

		pic@40000 {
			clock-frequency = <399999996>;
		};
	};
};

/*
 * The TL-WDR4900 v1 uses the NXP (Freescale) P1014 SoC which is closely
 * related to the P1010.
 *
 * NXP QP1010FS.pdf "QorIQ P1010 and P1014 Communications Processors"
 * datasheet states that the P1014 does not include the accelerated crypto
 * module (CAAM/SEC4) which is present in the P1010.
 *
 * NXP Appliation Note AN4938 Rev. 2 implies that some P1014 may contain the
 * SEC4 module, but states that SoCs with System Version Register values
 * 0x80F10110 or 0x80F10120 do not have the security feature.
 *
 * All v1.3 TL-WDR4900 tested have SVR == 0x80F10110 which AN4938 describes
 * as: core rev 1.0, "P1014 (without security)".
 *
 * The SVR value is reported by uboot on the serial console.
 */

/ {
	soc: soc@ffe00000 {
		/delete-node/ crypto@30000; /* Pulled in by p1010si-post */
	};
};

/*
 * For the OpenWrt 22.03 release, since Linux 5.10.138 now uses
 * aliases to determine PCI domain numbers, drop aliases so as not to
 * change the sysfs path of our wireless netdevs.
 */

/ {
	aliases {
		/delete-property/ pci0;
		/delete-property/ pci1;
	};
};