10 Commits

Author SHA1 Message Date
Jan Hoffmann
81e3017609 realtek: clean up rtl838x MDIO busy wait loop
Don't use udelay to allow other kernel tasks to execute if the kernel
has been built without preemption. Also determine the timeout based on
jiffies instead of loop iterations.

This is especially important on devices containing a watchdog with a
short timeout. Without this change, the watchdog is not serviced during
PHY patching which can take multiple seconds.

Tested-by: Birger Koblitz <mail@birger-koblitz.de>
Signed-off-by: Jan Hoffmann <jan@3e8.eu>
2022-07-28 14:08:51 +02:00
Birger Koblitz
d22923be66 realtek: Copy all BPDUs to the kernel
In order to receive STP information at the kernel level, we make sure
that all Bridge Protocol Data Units are copied to the CPU-Port.

Signed-off-by: Sebastian Gottschall <s.gottschall@dd-wrt.com>
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2022-02-17 15:21:47 +00:00
Birger Koblitz
9d396fc1e8 realtek: Add L2 aging configuration functions for all SoC families
Instead of a generic L2 aging configuration function with complex
logic, we implement an individual function for all SoC types.

Signed-off-by: Sebastian Gottschall <s.gottschall@dd-wrt.com>
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2022-02-17 15:21:47 +00:00
Birger Koblitz
f3c5e7ddcc realted: Add DSA bridge offload configuration
Add functionality to enable or disable L2 learning offload and port flooding
for RTL83XX.

Signed-off-by: Sebastian Gottschall <s.gottschall@dd-wrt.com>
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2022-02-17 15:21:47 +00:00
Birger Koblitz
32e5b5ee6b realtek: Add Link Aggregation (aka trunking) support
This adds LAG support for all 4 SoC families, including support
ofr the use of different distribution algorithm for the load-
balancing between individual links.

Signed-off-by: Sebastian Gottschall <s.gottschall@dd-wrt.com>
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2022-02-17 15:21:47 +00:00
Birger Koblitz
77f3e2ea17 realtek: Cleanup setting inner/outer PVID and Ingress/Egres VLAN filtering
Use setting functions instead of register numbers in order to clean up the code.
Also use enums to define inner/outer VLAN types and the filter type.

Signed-off-by: Sebastian Gottschall <s.gottschall@dd-wrt.com>
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2022-02-17 15:21:47 +00:00
Birger Koblitz
1f402512ae realtek: Add SoC-specific routing offload implementation
Adds SoC specific routing offload implementations for
RTL8380/90 and RTL9300. RTL83xx supports merely nexthop
routing, RTL9300 full host and prefix routes.

Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2021-10-09 08:25:06 +02:00
Birger Koblitz
28e972b2ea realtek: Configure initial L2 learning setup
Configure a sane L2 learning configuration upon DSA driver load so that the
switch can start learning L2 addresses. Also configure the correct flood masks
for broadcast and unknown unicast traffice.

Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2021-10-09 08:25:06 +02:00
Birger Koblitz
87b3bd07a4 realtek: Packet Inspection Engine support for RTL838x SoCs
Adds the RTL838x-specific PIE support routines.

Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2021-10-09 08:25:05 +02:00
INAGAKI Hiroshi
95170b4350 realtek: copy config/files/patches to 5.10
this patch copies the following files from 5.4 to 5.10:

- config-5.4   -> config-5.10
- files-5.4/   -> files-5.10/
- patches-5.4/ -> patches-5.10/

Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
[rebase on change in files-5.4]
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
2021-09-26 00:32:17 +02:00