16 Commits

Author SHA1 Message Date
Birger Koblitz
9ed6097054 realtek: Add HW support for RTL931X for PIE, L2 and STP aging
We add HW support routines for the RTL931X SoC family for handling
the Packet Inspection Engine, L2 table handling and STP aging.

Signed-off-by: Sebastian Gottschall <s.gottschall@dd-wrt.com>
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2022-02-17 15:21:47 +00:00
Birger Koblitz
724e4af530 realtek: Store and Restore MC memberships for port enable/disable
We need to store and restore MC memberships in HW when a port joins or
leaves a bridge as well as when it is enabled or disabled, as these
properties should not change in these situations.

Signed-off-by: Sebastian Gottschall <s.gottschall@dd-wrt.com>
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2022-02-17 15:21:47 +00:00
Birger Koblitz
d22923be66 realtek: Copy all BPDUs to the kernel
In order to receive STP information at the kernel level, we make sure
that all Bridge Protocol Data Units are copied to the CPU-Port.

Signed-off-by: Sebastian Gottschall <s.gottschall@dd-wrt.com>
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2022-02-17 15:21:47 +00:00
Birger Koblitz
9d396fc1e8 realtek: Add L2 aging configuration functions for all SoC families
Instead of a generic L2 aging configuration function with complex
logic, we implement an individual function for all SoC types.

Signed-off-by: Sebastian Gottschall <s.gottschall@dd-wrt.com>
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2022-02-17 15:21:47 +00:00
Birger Koblitz
f3c5e7ddcc realted: Add DSA bridge offload configuration
Add functionality to enable or disable L2 learning offload and port flooding
for RTL83XX.

Signed-off-by: Sebastian Gottschall <s.gottschall@dd-wrt.com>
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2022-02-17 15:21:47 +00:00
Birger Koblitz
32e5b5ee6b realtek: Add Link Aggregation (aka trunking) support
This adds LAG support for all 4 SoC families, including support
ofr the use of different distribution algorithm for the load-
balancing between individual links.

Signed-off-by: Sebastian Gottschall <s.gottschall@dd-wrt.com>
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2022-02-17 15:21:47 +00:00
Birger Koblitz
77f3e2ea17 realtek: Cleanup setting inner/outer PVID and Ingress/Egres VLAN filtering
Use setting functions instead of register numbers in order to clean up the code.
Also use enums to define inner/outer VLAN types and the filter type.

Signed-off-by: Sebastian Gottschall <s.gottschall@dd-wrt.com>
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2022-02-17 15:21:47 +00:00
Birger Koblitz
7026084066 realtek: Add SDS configuration routines for the RTL93XX platforms
Adds configuration routines for the internal SerDes of the
RTL930X and RTL931X.

Signed-off-by: Sebastian Gottschall <s.gottschall@dd-wrt.com>
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2022-02-17 15:21:47 +00:00
Birger Koblitz
51c8f76612 realtek: Improve MAC config handling for all SoCs
Adds a rtl931x_phylink_mac_config for the RTL931X and improve
the handling of the RTL930X phylink configuration. Add separate
handling of the RTL839x since some configurations are different
from the RTL838X.

Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2022-02-17 15:21:47 +00:00
Birger Koblitz
bf0ffe3310 realtek: Use SerDes Information from .dts for phylink config
When a port is brought up, read the SDS-id via the phy_device
for a given port and use this to configure the SDS when it
is brought up.

Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2022-02-17 15:21:47 +00:00
Birger Koblitz
9ae927febd realtek: Fix bug in VLAN ingress and egress filtering
The ingress filter registers use 2 bits for each port to define the filtering
state, whereas the egress filter uses 1 bit. So for for the ingress filter
the register offset for a given port is:
(port >> 4) << 4: since there are 16 entries in a register of 32 bits
and for the egress filter:
(port >> 5) << 4: since there are 32 entries in a register of 32 bits

Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2021-10-09 08:25:06 +02:00
Birger Koblitz
28e972b2ea realtek: Configure initial L2 learning setup
Configure a sane L2 learning configuration upon DSA driver load so that the
switch can start learning L2 addresses. Also configure the correct flood masks
for broadcast and unknown unicast traffice.

Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2021-10-09 08:25:06 +02:00
Birger Koblitz
9d9bf16aa8 realtek: Add phylink configuration routines for RTL93xx
This adds RTL93xx-specific MAC configuration routines that allow also configuration
of 10GBit links for phylink. There is support for the Realtek-specific HISGMI
protocol.

Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2021-10-09 08:25:06 +02:00
Birger Koblitz
54805fc911 realtek: Add driver support for TC offloading
This adds support for offloading TC flower by using the Packet Inspection Engine
of the RTL-SoCs. Basic infrastructure support is provide with callbacks to the
tc subsystem and support for HW packet counters.

Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
2021-10-09 08:25:05 +02:00
INAGAKI Hiroshi
a22602728c realtek: fix compile errors in dsa driver for 5.10
this patch fixes the following errors when compiling:

- dsa_switch_alloc is removed[1]

- a parameter "enum dsa_tag_protocol mprot" is added to dsa_tag_protocol
  in dsa_switch_ops (include/net/dsa.h)

- several paramters are added to "phylink_mac_link_up" in dsa_switch_ops
  (include/net/dsa.h)

  added:
    - int speed
    - int duplex
    - bool tx_pause
    - bool rx_pause

- a parameter "struct switchdev_trans *trans" is added to
  port_vlan_filtering in dsa_switch_ops (include/net/dsa.h)

[1]: https://lore.kernel.org/lkml/20191020031941.3805884-17-vivien.didelot@gmail.com/

Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
2021-09-26 00:32:18 +02:00
INAGAKI Hiroshi
95170b4350 realtek: copy config/files/patches to 5.10
this patch copies the following files from 5.4 to 5.10:

- config-5.4   -> config-5.10
- files-5.4/   -> files-5.10/
- patches-5.4/ -> patches-5.10/

Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
[rebase on change in files-5.4]
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
2021-09-26 00:32:17 +02:00