mac80211: ath11k: fix remapped ce access on 64-bit OS
https://lore.kernel.org/linux-wireless/TYZPR01MB55563B3A689D54D18179E5B4C9192@TYZPR01MB5556.apcprd01.prod.exchangelabs.com/ Signed-off-by: Ziyang Huang <hzyitc@outlook.com> Signed-off-by: George Moussalem <george.moussalem@outlook.com> Link: https://github.com/openwrt/openwrt/pull/17182 Signed-off-by: Robert Marko <robimarko@gmail.com>
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George Moussalem
Robert Marko
parent
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From: Ziyang Huang <hzyitc@outlook.com>
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Date: Thu, 2 May 2024 00:14:31 +0800
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Subject: [PATCH] wifi: ath11k: fix remapped ce accessing issue on 64bit OS
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On 64bit OS, when ab->mem_ce is lower than or 4G far away from ab->mem,
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u32 is not enough to store the offsets, which makes ath11k_ahb_read32()
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and ath11k_ahb_write32() access incorrect address and causes Data Abort
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Exception.
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Let's use the high bits of offsets to decide where to access, which is
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similar as ath11k_pci_get_window_start() done. In the future, we can merge
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these functions for unified regs accessing.
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Signed-off-by: Ziyang Huang <hzyitc@outlook.com>
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---
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--- a/drivers/net/wireless/ath/ath11k/ahb.c
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+++ b/drivers/net/wireless/ath/ath11k/ahb.c
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@@ -198,12 +198,18 @@ static const struct ath11k_pci_ops ath11
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static inline u32 ath11k_ahb_read32(struct ath11k_base *ab, u32 offset)
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{
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- return ioread32(ab->mem + offset);
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+ if ((offset & ATH11K_REG_TYPE_MASK) == ATH11K_REG_TYPE_CE)
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+ return ioread32(ab->mem_ce + FIELD_GET(ATH11K_REG_OFFSET_MASK, offset));
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+ else
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+ return ioread32(ab->mem + FIELD_GET(ATH11K_REG_OFFSET_MASK, offset));
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}
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static inline void ath11k_ahb_write32(struct ath11k_base *ab, u32 offset, u32 value)
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{
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- iowrite32(value, ab->mem + offset);
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+ if ((offset & ATH11K_REG_TYPE_MASK) == ATH11K_REG_TYPE_CE)
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+ iowrite32(value, ab->mem_ce + FIELD_GET(ATH11K_REG_OFFSET_MASK, offset));
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+ else
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+ iowrite32(value, ab->mem + FIELD_GET(ATH11K_REG_OFFSET_MASK, offset));
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}
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static void ath11k_ahb_kill_tasklets(struct ath11k_base *ab)
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@@ -275,9 +281,9 @@ static void ath11k_ahb_ce_irq_enable(str
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const struct ce_ie_addr *ce_ie_addr = ab->hw_params.ce_ie_addr;
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u32 ie1_reg_addr, ie2_reg_addr, ie3_reg_addr;
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- ie1_reg_addr = ce_ie_addr->ie1_reg_addr + ATH11K_CE_OFFSET(ab);
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- ie2_reg_addr = ce_ie_addr->ie2_reg_addr + ATH11K_CE_OFFSET(ab);
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- ie3_reg_addr = ce_ie_addr->ie3_reg_addr + ATH11K_CE_OFFSET(ab);
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+ ie1_reg_addr = ce_ie_addr->ie1_reg_addr;
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+ ie2_reg_addr = ce_ie_addr->ie2_reg_addr;
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+ ie3_reg_addr = ce_ie_addr->ie3_reg_addr;
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ce_attr = &ab->hw_params.host_ce_config[ce_id];
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if (ce_attr->src_nentries)
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@@ -296,9 +302,9 @@ static void ath11k_ahb_ce_irq_disable(st
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const struct ce_ie_addr *ce_ie_addr = ab->hw_params.ce_ie_addr;
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u32 ie1_reg_addr, ie2_reg_addr, ie3_reg_addr;
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- ie1_reg_addr = ce_ie_addr->ie1_reg_addr + ATH11K_CE_OFFSET(ab);
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- ie2_reg_addr = ce_ie_addr->ie2_reg_addr + ATH11K_CE_OFFSET(ab);
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- ie3_reg_addr = ce_ie_addr->ie3_reg_addr + ATH11K_CE_OFFSET(ab);
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+ ie1_reg_addr = ce_ie_addr->ie1_reg_addr;
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+ ie2_reg_addr = ce_ie_addr->ie2_reg_addr;
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+ ie3_reg_addr = ce_ie_addr->ie3_reg_addr;
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ce_attr = &ab->hw_params.host_ce_config[ce_id];
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if (ce_attr->src_nentries)
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--- a/drivers/net/wireless/ath/ath11k/hal.c
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+++ b/drivers/net/wireless/ath/ath11k/hal.c
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@@ -1247,20 +1247,16 @@ static int ath11k_hal_srng_create_config
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s->reg_start[1] = HAL_SEQ_WCSS_UMAC_TCL_REG + HAL_TCL_STATUS_RING_HP;
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s = &hal->srng_config[HAL_CE_SRC];
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- s->reg_start[0] = HAL_SEQ_WCSS_UMAC_CE0_SRC_REG(ab) + HAL_CE_DST_RING_BASE_LSB +
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- ATH11K_CE_OFFSET(ab);
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- s->reg_start[1] = HAL_SEQ_WCSS_UMAC_CE0_SRC_REG(ab) + HAL_CE_DST_RING_HP +
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- ATH11K_CE_OFFSET(ab);
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+ s->reg_start[0] = HAL_SEQ_WCSS_UMAC_CE0_SRC_REG(ab) + HAL_CE_DST_RING_BASE_LSB;
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+ s->reg_start[1] = HAL_SEQ_WCSS_UMAC_CE0_SRC_REG(ab) + HAL_CE_DST_RING_HP;
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s->reg_size[0] = HAL_SEQ_WCSS_UMAC_CE1_SRC_REG(ab) -
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HAL_SEQ_WCSS_UMAC_CE0_SRC_REG(ab);
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s->reg_size[1] = HAL_SEQ_WCSS_UMAC_CE1_SRC_REG(ab) -
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HAL_SEQ_WCSS_UMAC_CE0_SRC_REG(ab);
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s = &hal->srng_config[HAL_CE_DST];
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- s->reg_start[0] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab) + HAL_CE_DST_RING_BASE_LSB +
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- ATH11K_CE_OFFSET(ab);
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- s->reg_start[1] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab) + HAL_CE_DST_RING_HP +
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- ATH11K_CE_OFFSET(ab);
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+ s->reg_start[0] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab) + HAL_CE_DST_RING_BASE_LSB;
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+ s->reg_start[1] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab) + HAL_CE_DST_RING_HP;
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s->reg_size[0] = HAL_SEQ_WCSS_UMAC_CE1_DST_REG(ab) -
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HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab);
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s->reg_size[1] = HAL_SEQ_WCSS_UMAC_CE1_DST_REG(ab) -
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@@ -1268,9 +1264,8 @@ static int ath11k_hal_srng_create_config
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s = &hal->srng_config[HAL_CE_DST_STATUS];
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s->reg_start[0] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab) +
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- HAL_CE_DST_STATUS_RING_BASE_LSB + ATH11K_CE_OFFSET(ab);
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- s->reg_start[1] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab) + HAL_CE_DST_STATUS_RING_HP +
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- ATH11K_CE_OFFSET(ab);
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+ HAL_CE_DST_STATUS_RING_BASE_LSB;
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+ s->reg_start[1] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab) + HAL_CE_DST_STATUS_RING_HP;
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s->reg_size[0] = HAL_SEQ_WCSS_UMAC_CE1_DST_REG(ab) -
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HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab);
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s->reg_size[1] = HAL_SEQ_WCSS_UMAC_CE1_DST_REG(ab) -
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--- a/drivers/net/wireless/ath/ath11k/hw.c
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+++ b/drivers/net/wireless/ath/ath11k/hw.c
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@@ -2268,9 +2268,9 @@ const struct ce_ie_addr ath11k_ce_ie_add
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};
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const struct ce_ie_addr ath11k_ce_ie_addr_ipq5018 = {
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- .ie1_reg_addr = CE_HOST_IPQ5018_IE_ADDRESS - HAL_IPQ5018_CE_WFSS_REG_BASE,
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- .ie2_reg_addr = CE_HOST_IPQ5018_IE_2_ADDRESS - HAL_IPQ5018_CE_WFSS_REG_BASE,
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- .ie3_reg_addr = CE_HOST_IPQ5018_IE_3_ADDRESS - HAL_IPQ5018_CE_WFSS_REG_BASE,
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+ .ie1_reg_addr = ATH11K_REG_TYPE_CE + CE_HOST_IPQ5018_IE_ADDRESS - HAL_IPQ5018_CE_WFSS_REG_BASE,
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+ .ie2_reg_addr = ATH11K_REG_TYPE_CE + CE_HOST_IPQ5018_IE_2_ADDRESS - HAL_IPQ5018_CE_WFSS_REG_BASE,
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+ .ie3_reg_addr = ATH11K_REG_TYPE_CE + CE_HOST_IPQ5018_IE_3_ADDRESS - HAL_IPQ5018_CE_WFSS_REG_BASE,
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};
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const struct ce_remap ath11k_ce_remap_ipq5018 = {
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@@ -2801,13 +2801,13 @@ const struct ath11k_hw_regs ipq5018_regs
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.hal_reo_status_hp = 0x00003070,
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/* WCSS relative address */
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- .hal_seq_wcss_umac_ce0_src_reg = 0x08400000
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+ .hal_seq_wcss_umac_ce0_src_reg = ATH11K_REG_TYPE_CE + 0x08400000
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- HAL_IPQ5018_CE_WFSS_REG_BASE,
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- .hal_seq_wcss_umac_ce0_dst_reg = 0x08401000
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+ .hal_seq_wcss_umac_ce0_dst_reg = ATH11K_REG_TYPE_CE + 0x08401000
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- HAL_IPQ5018_CE_WFSS_REG_BASE,
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- .hal_seq_wcss_umac_ce1_src_reg = 0x08402000
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+ .hal_seq_wcss_umac_ce1_src_reg = ATH11K_REG_TYPE_CE + 0x08402000
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- HAL_IPQ5018_CE_WFSS_REG_BASE,
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- .hal_seq_wcss_umac_ce1_dst_reg = 0x08403000
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+ .hal_seq_wcss_umac_ce1_dst_reg = ATH11K_REG_TYPE_CE + 0x08403000
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- HAL_IPQ5018_CE_WFSS_REG_BASE,
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/* WBM Idle address */
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--- a/drivers/net/wireless/ath/ath11k/hw.h
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+++ b/drivers/net/wireless/ath/ath11k/hw.h
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@@ -81,7 +81,12 @@
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#define ATH11K_M3_FILE "m3.bin"
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#define ATH11K_REGDB_FILE_NAME "regdb.bin"
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-#define ATH11K_CE_OFFSET(ab) (ab->mem_ce - ab->mem)
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+#define ATH11K_REG_TYPE_MASK GENMASK(31, 28)
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+#define ATH11K_REG_TYPE(x) FIELD_PREP_CONST(ATH11K_REG_TYPE_MASK, x)
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+#define ATH11K_REG_TYPE_NORMAL ATH11K_REG_TYPE(0)
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+#define ATH11K_REG_TYPE_DP ATH11K_REG_TYPE(1)
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+#define ATH11K_REG_TYPE_CE ATH11K_REG_TYPE(2)
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+#define ATH11K_REG_OFFSET_MASK GENMASK(27, 0)
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enum ath11k_hw_rate_cck {
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ATH11K_HW_RATE_CCK_LP_11M = 0,
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