uboot-sifiveu: bump to 2023.10
Upgrade the u-boot to a more recent version, and drop and refresh patches while at it. Additionally, use the correct architecture when running mkimage. Runtime-tested: - SiFive Unleashed - SiFive Unmatched Dropped: 0009-riscv-Fix-build-against-binutils.patch Added: 0006-riscv-sifive-fu740-reduce-DDR-speed-from-1866MT-s-to.patch Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
This commit is contained in:
Zoltan HERPAI
parent
ef22d4af1f
commit
e60729c720
@ -7,8 +7,8 @@ include $(TOPDIR)/rules.mk
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include $(INCLUDE_DIR)/kernel.mk
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PKG_RELEASE:=1
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PKG_VERSION:=2022.10
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PKG_HASH:=50b4482a505bc281ba8470c399a3c26e145e29b23500bc35c50debd7fa46bdf8
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PKG_VERSION:=2023.10
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PKG_HASH:=e00e6c6f014e046101739d08d06f328811cebcf5ae101348f409cbbd55ce6900
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UBOOT_USE_INTREE_DTC:=1
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@ -58,7 +58,7 @@ define Build/InstallDev
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$(INSTALL_BIN) $(PKG_BUILD_DIR)/spl/u-boot-spl.bin $(STAGING_DIR_IMAGE)/$(BUILD_VARIANT)-$(UBOOT_IMAGE)-spl
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$(INSTALL_BIN) $(PKG_BUILD_DIR)/$(DTS_DIR)/$(UBOOT_DTS) $(STAGING_DIR_IMAGE)/$(UBOOT_DTS)
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mkimage -C none -A arm -T script -d uEnv-$(UENV).txt \
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mkimage -C none -A riscv -T script -d uEnv-$(UENV).txt \
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$(STAGING_DIR_IMAGE)/$(BUILD_DEVICES)-boot.scr
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endef
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@ -1,19 +1,42 @@
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From 725595e667cc4423347c255da8ca4c5b3aa0980a Mon Sep 17 00:00:00 2001
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From 2ba4e6d78e0a63e5d491f9b01b498899e58cb58d Mon Sep 17 00:00:00 2001
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From: Vincent Chen <vincent.chen@sifive.com>
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Date: Mon, 15 Nov 2021 03:31:04 -0800
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Subject: [PATCH 2/8] board: sifive: spl: Initialized the PWM setting in the
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Subject: [PATCH 1/5] board: sifive: spl: Initialized the PWM setting in the
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SPL stage
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LEDs and multiple fans can be controlled by SPL. This patch ensures
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that all fans have been enabled in the SPL stage. In addition, the
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LED's color will be set to yellow.
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Upstream-Status: Pending
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Signed-off-by: Vincent Chen <vincent.chen@sifive.com>
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---
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board/sifive/unmatched/Makefile | 1 +
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board/sifive/unmatched/pwm.c | 57 +++++++++++++++++++++++++++++++++
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board/sifive/unmatched/spl.c | 2 ++
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3 files changed, 60 insertions(+)
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arch/riscv/include/asm/arch-fu740/eeprom.h | 15 ++++++
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board/sifive/unmatched/Makefile | 1 +
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board/sifive/unmatched/pwm.c | 57 ++++++++++++++++++++++
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board/sifive/unmatched/spl.c | 2 +
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4 files changed, 75 insertions(+)
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create mode 100644 arch/riscv/include/asm/arch-fu740/eeprom.h
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create mode 100644 board/sifive/unmatched/pwm.c
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--- /dev/null
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+++ b/arch/riscv/include/asm/arch-fu740/eeprom.h
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@@ -0,0 +1,15 @@
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+/* SPDX-License-Identifier: GPL-2.0 */
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+/*
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+ * Copyright (C) 2021 SiFive, Inc.
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+ *
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+ * Zong Li <zong.li@sifve.com>
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+ */
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+
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+#ifndef _ASM_RISCV_EEPROM_H
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+#define _ASM_RISCV_EEPROM_H
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+
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+#define PCB_REVISION_REV3 0x3
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+
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+u8 get_pcb_revision_from_eeprom(void);
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+
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+#endif /* _ASM_RISCV_EEPROM_H */
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--- a/board/sifive/unmatched/Makefile
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+++ b/board/sifive/unmatched/Makefile
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@@ -9,3 +9,4 @@ obj-y += spl.o
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@ -1,13 +1,16 @@
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From 7ead6d662a2f9d8498af6650ea38418c64b52048 Mon Sep 17 00:00:00 2001
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From 0dfab8fab80107aa4ad7d41a8ff47e5ff59632f9 Mon Sep 17 00:00:00 2001
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From: Vincent Chen <vincent.chen@sifive.com>
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Date: Mon, 24 Jan 2022 02:42:02 -0800
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Subject: [PATCH 3/8] board: sifive: Set LED's color to purple in the U-boot
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Subject: [PATCH 2/5] board: sifive: Set LED's color to purple in the U-boot
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stage
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Set LED's color to purple in the U-boot stage. Because there are still
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some functions to be executed before board_early_init_f(), it means
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the LED's is not changed to purple instantly when entering the U-boot
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stage.
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Upstream-Status: Pending
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Signed-off-by: Vincent Chen <vincent.chen@sifive.com>
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---
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board/sifive/unmatched/pwm.c | 7 +++++++
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board/sifive/unmatched/unmatched.c | 6 ++++++
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@ -52,7 +55,7 @@ stage.
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/* enable all cache ways */
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--- a/configs/sifive_unmatched_defconfig
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+++ b/configs/sifive_unmatched_defconfig
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@@ -62,3 +62,4 @@ CONFIG_DM_SCSI=y
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@@ -63,3 +63,4 @@ CONFIG_DM_SCSI=y
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CONFIG_USB=y
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CONFIG_USB_XHCI_HCD=y
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CONFIG_USB_XHCI_PCI=y
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@ -1,20 +1,23 @@
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From 6ef7023c0dcfde320015ab19e0e0d423921be77d Mon Sep 17 00:00:00 2001
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From 1a48019dd4b69dd76551217a61cc4cab9e92fd39 Mon Sep 17 00:00:00 2001
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From: Vincent Chen <vincent.chen@sifive.com>
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Date: Mon, 15 Nov 2021 03:39:07 -0800
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Subject: [PATCH 1/2] board: sifive: Set LED's color to blue before jumping to
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Subject: [PATCH 3/5] board: sifive: Set LED's color to blue before jumping to
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Linux
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The LED's color wil be changed from purple to blue before executing
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the sysboot command. Because the sysboot command includes the image loading
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from the boot partition, It means the LED's color is blue when executing
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"Retrieving file: /Image.gz".
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Upstream-Status: Pending
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Signed-off-by: Vincent Chen <vincent.chen@sifive.com>
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---
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include/configs/sifive-unmatched.h | 7 ++++++-
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1 file changed, 6 insertions(+), 1 deletion(-)
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--- a/include/configs/sifive-unmatched.h
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+++ b/include/configs/sifive-unmatched.h
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@@ -49,7 +49,12 @@
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@@ -48,6 +48,11 @@
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"type_guid_gpt_system=" TYPE_GUID_SYSTEM "\0" \
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"partitions=" PARTS_DEFAULT "\0" \
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"fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \
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@ -26,5 +29,4 @@ from the boot partition, It means the LED's color is blue when executing
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+ "sysboot ${devtype} ${devnum}:${distro_bootpart} any " \
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+ "${scriptaddr} ${prefix}${boot_syslinux_conf};\0"
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#define CONFIG_SYS_EEPROM_BUS_NUM 0
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#endif /* __SIFIVE_UNMATCHED_H */
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@ -0,0 +1,67 @@
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From 877afdf63129caa64d70d4a1252eec44778cfa0e Mon Sep 17 00:00:00 2001
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From: Vincent Chen <vincent.chen@sifive.com>
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Date: Mon, 24 Jan 2022 02:57:40 -0800
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Subject: [PATCH 4/5] board: sifive: spl: Set remote thermal of TMP451 to 85
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deg C
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for the unmatched board
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For TMP451 on the unmatched board, the default value of the remote
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thermal threshold is 108 deg C. This commit initilizes it to 85 deg C at SPL.
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Upstream-Status: Pending
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Signed-off-by: Vincent Chen <vincent.chen@sifive.com>
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Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com>
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---
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board/sifive/unmatched/spl.c | 26 ++++++++++++++++++++++++++
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1 file changed, 26 insertions(+)
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--- a/board/sifive/unmatched/spl.c
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+++ b/board/sifive/unmatched/spl.c
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@@ -10,6 +10,8 @@
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#include <spl.h>
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#include <misc.h>
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#include <log.h>
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+#include <config.h>
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+#include <i2c.h>
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#include <linux/delay.h>
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#include <linux/io.h>
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#include <asm/gpio.h>
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@@ -26,6 +28,24 @@
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#define MODE_SELECT_SD 0xb
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#define MODE_SELECT_MASK GENMASK(3, 0)
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+#define TMP451_REMOTE_THERM_LIMIT_REG_OFFSET 0x19
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+#define TMP451_REMOTE_THERM_LIMIT_INIT_VALUE 0x55
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+
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+static inline int init_tmp451_remote_therm_limit(void)
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+{
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+ struct udevice *dev;
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+ unsigned char r_therm_limit = TMP451_REMOTE_THERM_LIMIT_INIT_VALUE;
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+ int ret;
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+
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+ ret = i2c_get_chip_for_busnum(0, 0x4c, 0x1, &dev);
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+
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+ if (!ret)
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+ ret = dm_i2c_write(dev, TMP451_REMOTE_THERM_LIMIT_REG_OFFSET,
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+ &r_therm_limit,
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+ sizeof(unsigned char));
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+ return ret;
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+}
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+
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static inline int spl_reset_device_by_gpio(const char *label, int pin, int low_width)
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{
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int ret;
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@@ -92,6 +112,12 @@ int spl_board_init_f(void)
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pwm_device_init();
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+ ret = init_tmp451_remote_therm_limit();
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+ if (ret) {
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+ debug("TMP451 remote THERM limit init failed: %d\n", ret);
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+ goto end;
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+ }
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+
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ret = spl_gemgxl_init();
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if (ret) {
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debug("Gigabit ethernet PHY (VSC8541) init failed: %d\n", ret);
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@ -1,111 +0,0 @@
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From 07f84ed283b913cbdf87181ae2ed65467d923df5 Mon Sep 17 00:00:00 2001
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From: Vincent Chen <vincent.chen@sifive.com>
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Date: Mon, 24 Jan 2022 02:57:40 -0800
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Subject: [PATCH 2/2] board: sifive: spl: Set remote thermal of TMP451 to 85
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deg C for the unmatched board
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For TMP451 on the unmatched board, the default value of the remote
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thermal threshold is 108 deg C. This commit initilizes it to 85 deg C at SPL.
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---
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board/sifive/unmatched/spl.c | 29 +++++++++++++++++++++++++++++
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drivers/misc/Kconfig | 10 ++++++++++
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include/configs/sifive-unmatched.h | 4 ++++
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scripts/config_whitelist.txt | 1 +
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4 files changed, 44 insertions(+)
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--- a/board/sifive/unmatched/spl.c
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+++ b/board/sifive/unmatched/spl.c
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@@ -10,6 +10,8 @@
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#include <spl.h>
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#include <misc.h>
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#include <log.h>
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+#include <config.h>
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+#include <i2c.h>
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#include <linux/delay.h>
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#include <linux/io.h>
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#include <asm/gpio.h>
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@@ -26,6 +28,27 @@
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#define MODE_SELECT_SD 0xb
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#define MODE_SELECT_MASK GENMASK(3, 0)
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+#define TMP451_REMOTE_THERM_LIMIT_REG_OFFSET 0x19
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+#define TMP451_REMOTE_THERM_LIMIT_INIT_VALUE 0x55
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+
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+static inline int init_tmp451_remote_therm_limit(void)
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+{
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+ struct udevice *dev;
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+ unsigned char r_therm_limit = TMP451_REMOTE_THERM_LIMIT_INIT_VALUE;
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+ int ret;
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+
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+ ret = i2c_get_chip_for_busnum(CONFIG_SYS_TMP451_BUS_NUM,
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+ CONFIG_SYS_I2C_TMP451_ADDR,
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+ CONFIG_SYS_I2C_TMP451_ADDR_LEN,
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+ &dev);
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+
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+ if (!ret)
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+ ret = dm_i2c_write(dev, TMP451_REMOTE_THERM_LIMIT_REG_OFFSET,
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+ &r_therm_limit,
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+ sizeof(unsigned char));
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+ return ret;
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+}
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+
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static inline int spl_reset_device_by_gpio(const char *label, int pin, int low_width)
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{
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int ret;
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@@ -92,6 +115,12 @@ int spl_board_init_f(void)
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pwm_device_init();
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+ ret = init_tmp451_remote_therm_limit();
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+ if (ret) {
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+ debug("TMP451 remote THERM limit init failed: %d\n", ret);
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+ goto end;
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+ }
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+
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ret = spl_gemgxl_init();
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if (ret) {
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debug("Gigabit ethernet PHY (VSC8541) init failed: %d\n", ret);
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--- a/drivers/misc/Kconfig
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+++ b/drivers/misc/Kconfig
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@@ -536,8 +536,18 @@ config SYS_I2C_EEPROM_ADDR
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depends on ID_EEPROM || I2C_EEPROM || SPL_I2C_EEPROM || CMD_EEPROM || ENV_IS_IN_EEPROM
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default 0
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+config SYS_I2C_TMP451_ADDR
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+ hex "Chip address of the TMP451 device"
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+ default 0
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+
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if I2C_EEPROM
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+config SYS_I2C_TMP451_ADDR_LEN
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+ int "Length in bytes of the TMP451 memory array address"
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+ default 1
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+ help
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+ Note: This is NOT the chip address length!
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+
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config SYS_I2C_EEPROM_ADDR_OVERFLOW
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hex "EEPROM Address Overflow"
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default 0x0
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--- a/include/configs/sifive-unmatched.h
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+++ b/include/configs/sifive-unmatched.h
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@@ -15,6 +15,10 @@
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#define CONFIG_STANDALONE_LOAD_ADDR 0x80200000
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+#define CONFIG_SYS_TMP451_BUS_NUM 0
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+#define CONFIG_SYS_I2C_TMP451_ADDR 0x4c
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+#define CONFIG_SYS_I2C_TMP451_ADDR_LEN 0x1
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+
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/* Environment options */
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#define BOOT_TARGET_DEVICES(func) \
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--- a/scripts/config_whitelist.txt
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+++ b/scripts/config_whitelist.txt
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@@ -1268,6 +1268,7 @@ CONFIG_SYS_TIMER_BASE
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CONFIG_SYS_TIMER_COUNTER
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CONFIG_SYS_TIMER_COUNTS_DOWN
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CONFIG_SYS_TIMER_RATE
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+CONFIG_SYS_TMP451_BUS_NUM
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CONFIG_SYS_TMPVIRT
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CONFIG_SYS_TSEC1_OFFSET
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CONFIG_SYS_TX_ETH_BUFFER
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@ -1,7 +1,7 @@
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From c29e4d84cfa17ab96eff2a9044f486ba3c8b5c43 Mon Sep 17 00:00:00 2001
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From 9b2868e9fda750c985313a40e60b67f96dc77ed1 Mon Sep 17 00:00:00 2001
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From: Atish Patra <atish.patra@wdc.com>
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Date: Mon, 25 Oct 2021 11:35:41 -0700
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Subject: [PATCH] riscv: dts: Add few PMU events
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Subject: [PATCH 5/5] riscv: dts: Add few PMU events
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fu740 has 2 HPM counters and many HPM events defined in the fu740 manual[1].
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This patch adds some of these events and their mapping as per the
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@ -9,6 +9,7 @@ OpenSBI PMU DT binding for now.
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[1]https://sifive.cdn.prismic.io/sifive/de1491e5-077c-461d-9605-e8a0ce57337d_fu740-c000-manual-v1p3.pdf
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Upstream-Status: Pending
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Signed-off-by: Atish Patra <atish.patra@wdc.com>
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---
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arch/riscv/dts/fu740-c000.dtsi | 11 +++++++++++
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@ -0,0 +1,22 @@
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From 45f9941ddc6346b38aa9eb7f033e1e169b63bdc7 Mon Sep 17 00:00:00 2001
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From: Thomas Perrot <thomas.perrot@bootlin.com>
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Date: Fri, 8 Dec 2023 11:24:37 +0100
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Subject: [PATCH] riscv: sifive: fu740: reduce DDR speed from 1866MT/s to
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1600MT/s
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Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com>
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---
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arch/riscv/dts/fu740-c000-u-boot.dtsi | 2 +-
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1 file changed, 1 insertion(+), 1 deletion(-)
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--- a/arch/riscv/dts/fu740-c000-u-boot.dtsi
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+++ b/arch/riscv/dts/fu740-c000-u-boot.dtsi
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@@ -77,7 +77,7 @@
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0x0 0x100b2000 0x0 0x2000
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0x0 0x100b8000 0x0 0x1000>;
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clocks = <&prci FU740_PRCI_CLK_DDRPLL>;
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- clock-frequency = <933333324>;
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+ clock-frequency = <800000004>;
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bootph-pre-ram;
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};
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};
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@ -1,48 +0,0 @@
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commit 1dde977518f13824b847e23275001191139bc384
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Author: Alexandre Ghiti <alexandre.ghiti@canonical.com>
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Date: Mon Oct 3 18:07:54 2022 +0200
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riscv: Fix build against binutils 2.38
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The following description is copied from the equivalent patch for the
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Linux Kernel proposed by Aurelien Jarno:
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>From version 2.38, binutils default to ISA spec version 20191213. This
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means that the csr read/write (csrr*/csrw*) instructions and fence.i
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instruction has separated from the `I` extension, become two standalone
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extensions: Zicsr and Zifencei. As the kernel uses those instruction,
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this causes the following build failure:
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arch/riscv/cpu/mtrap.S: Assembler messages:
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arch/riscv/cpu/mtrap.S:65: Error: unrecognized opcode `csrr a0,scause'
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arch/riscv/cpu/mtrap.S:66: Error: unrecognized opcode `csrr a1,sepc'
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arch/riscv/cpu/mtrap.S:67: Error: unrecognized opcode `csrr a2,stval'
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arch/riscv/cpu/mtrap.S:70: Error: unrecognized opcode `csrw sepc,a0'
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Signed-off-by: Alexandre Ghiti <alexandre.ghiti@canonical.com>
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Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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Tested-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
||||
Tested-by: Heiko Stuebner <heiko@sntech.de>
|
||||
Tested-by: Christian Stewart <christian@paral.in>
|
||||
Reviewed-by: Rick Chen <rick@andestech.com>
|
||||
|
||||
--- a/arch/riscv/Makefile
|
||||
+++ b/arch/riscv/Makefile
|
||||
@@ -24,7 +24,16 @@ ifeq ($(CONFIG_CMODEL_MEDANY),y)
|
||||
CMODEL = medany
|
||||
endif
|
||||
|
||||
-ARCH_FLAGS = -march=$(ARCH_BASE)$(ARCH_A)$(ARCH_C) -mabi=$(ABI) \
|
||||
+RISCV_MARCH = $(ARCH_BASE)$(ARCH_A)$(ARCH_C)
|
||||
+
|
||||
+# Newer binutils versions default to ISA spec version 20191213 which moves some
|
||||
+# instructions from the I extension to the Zicsr and Zifencei extensions.
|
||||
+toolchain-need-zicsr-zifencei := $(call cc-option-yn, -mabi=$(ABI) -march=$(RISCV_MARCH)_zicsr_zifencei)
|
||||
+ifeq ($(toolchain-need-zicsr-zifencei),y)
|
||||
+ RISCV_MARCH := $(RISCV_MARCH)_zicsr_zifencei
|
||||
+endif
|
||||
+
|
||||
+ARCH_FLAGS = -march=$(RISCV_MARCH) -mabi=$(ABI) \
|
||||
-mcmodel=$(CMODEL)
|
||||
|
||||
PLATFORM_CPPFLAGS += $(ARCH_FLAGS)
|
||||
@ -17,7 +17,7 @@ Cc: Simon Glass <sjg@chromium.org>
|
||||
|
||||
--- a/tools/fit_image.c
|
||||
+++ b/tools/fit_image.c
|
||||
@@ -729,9 +729,14 @@ static int fit_handle_file(struct image_
|
||||
@@ -754,9 +754,14 @@ static int fit_handle_file(struct image_
|
||||
}
|
||||
*cmd = '\0';
|
||||
} else if (params->datafile) {
|
||||
|
||||
@ -1,10 +1,10 @@
|
||||
--- a/tools/Makefile
|
||||
+++ b/tools/Makefile
|
||||
@@ -119,7 +119,6 @@ dumpimage-mkimage-objs := aisimage.o \
|
||||
@@ -114,7 +114,6 @@ dumpimage-mkimage-objs := aisimage.o \
|
||||
imximage.o \
|
||||
imx8image.o \
|
||||
imx8mimage.o \
|
||||
- kwbimage.o \
|
||||
lib/md5.o \
|
||||
generated/lib/md5.o \
|
||||
lpc32xximage.o \
|
||||
mxsimage.o \
|
||||
|
||||
@ -1,6 +1,6 @@
|
||||
--- a/tools/image-host.c
|
||||
+++ b/tools/image-host.c
|
||||
@@ -1122,6 +1122,7 @@ static int fit_config_add_verification_d
|
||||
@@ -1125,6 +1125,7 @@ static int fit_config_add_verification_d
|
||||
* 2) get public key (X509_get_pubkey)
|
||||
* 3) provide der format (d2i_RSAPublicKey)
|
||||
*/
|
||||
@ -8,7 +8,7 @@
|
||||
static int read_pub_key(const char *keydir, const void *name,
|
||||
unsigned char **pubkey, int *pubkey_len)
|
||||
{
|
||||
@@ -1175,6 +1176,13 @@ err_cert:
|
||||
@@ -1178,6 +1179,13 @@ err_cert:
|
||||
fclose(f);
|
||||
return ret;
|
||||
}
|
||||
|
||||
Loading…
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Reference in New Issue
Block a user