rockchip: add support for Radxa ROCK Pi S
Radxa ROCK Pi S is a small in size, full in features SBC[1] using the Rockchip RK3308B SoC. Hardware -------- - Rockchip RK3308B SoC - Quad A35 CPU - 256/512MB DDR3 RAM - Optional 4/8GB eMMC - Micro SD Card slot - Optional WiFi 4 and BT 4 (not supported yet) - 1x 100M Ethernet with PoE support (additional PoE HAT required) - 1x USB 2.0 Type-A port (Host) - 1x USB 2.0 Type-C port (OTG) - 2x 26 Pin GPIO header [1] https://radxa.com/products/rockpi/pis Installation ------------ Uncompress the OpenWrt sysupgrade and write it to a micro SD card or internal eMMC using dd. Signed-off-by: FUKAUMI Naoki <naoki@radxa.com> Link: https://github.com/openwrt/openwrt/pull/15933 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
This commit is contained in:
FUKAUMI Naoki
Hauke Mehrtens
parent
2d31004133
commit
bbcd5111cb
@ -25,6 +25,19 @@ define Trusted-Firmware-A/Default
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BUILD_TARGET:=rockchip
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endef
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define Trusted-Firmware-A/rk3308
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BUILD_SUBTARGET:=armv8
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ATF:=rk33/rk3308_bl31_v2.26.elf
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TPL:=rk33/rk3308_ddr_589MHz_uart2_m1_v2.07.bin
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endef
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define Trusted-Firmware-A/rk3308-rock-pi-s
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NAME:=Radxa ROCK Pi S
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BUILD_SUBTARGET:=armv8
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ATF:=rk33/rk3308_bl31_v2.26.elf
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TPL:=rk33/rk3308_ddr_589MHz_uart0_m0_v2.07.bin
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endef
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define Trusted-Firmware-A/rk3566
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BUILD_SUBTARGET:=armv8
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ATF:=rk35/rk3568_bl31_v1.44.elf
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@ -45,10 +58,28 @@ define Trusted-Firmware-A/rk3568-e25
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endef
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TFA_TARGETS:= \
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rk3308 \
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rk3308-rock-pi-s \
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rk3566 \
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rk3568 \
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rk3568-e25
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ifeq ($(BUILD_VARIANT),rk3308-rock-pi-s)
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TPL_FILE:=rk3308_ddr_589MHz_uart0_m0_v2.07.bin
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define Download/rk3308-tpl-rock-pi-s
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FILE:=$(TPL_FILE)
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URL:=https://github.com/radxa/rkbin/raw/5696fab20dcac57c1458f72dc7604ba60e553adf/bin/rk33/
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HASH:=8a1a42df23cccb86a2dabc14a5c0e9227d64a51b9b83e9968ef5af3b30787f7d
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endef
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define Build/Prepare
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$(eval $(call Download,rk3308-tpl-rock-pi-s))
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$(call Build/Prepare/Default)
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$(CP) $(DL_DIR)/$(TPL_FILE) $(PKG_BUILD_DIR)/bin/rk33/
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endef
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endif
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ifeq ($(BUILD_VARIANT),rk3568-e25)
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TPL_FILE:=rk3568_ddr_1560MHz_uart2_m0_115200_v1.21.bin
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define Download/rk3568-tpl-e25
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@ -24,6 +24,24 @@ define U-Boot/Default
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endef
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# RK3308 boards
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define U-Boot/rk3308/Default
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BUILD_SUBTARGET:=armv8
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DEPENDS:=+PACKAGE_u-boot-$(1):trusted-firmware-a-rk3308
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ATF:=rk3308_bl31_v2.26.elf
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TPL:=rk3308_ddr_589MHz_uart2_m1_v2.07.bin
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endef
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define U-Boot/rock-pi-s-rk3308
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$(U-Boot/rk3308/Default)
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DEPENDS:=+PACKAGE_u-boot-$(1):trusted-firmware-a-rk3308-rock-pi-s
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TPL:=rk3308_ddr_589MHz_uart0_m0_v2.07.bin
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NAME:=ROCK Pi S
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BUILD_DEVICES:= \
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radxa_rock-pi-s
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endef
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# RK3328 boards
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define U-Boot/rk3328/Default
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@ -186,6 +204,7 @@ UBOOT_TARGETS := \
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nanopi-r4s-rk3399 \
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rock-pi-4-rk3399 \
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rockpro64-rk3399 \
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rock-pi-s-rk3308 \
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nanopi-r2c-rk3328 \
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nanopi-r2c-plus-rk3328 \
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nanopi-r2s-rk3328 \
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@ -131,6 +131,17 @@ define Device/radxa_rock-pi-e
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endef
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TARGET_DEVICES += radxa_rock-pi-e
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define Device/radxa_rock-pi-s
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DEVICE_VENDOR := Radxa
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DEVICE_MODEL := ROCK Pi S
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SOC := rk3308
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DEVICE_DTS := rockchip/rk3308-rock-pi-s
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BOOT_SCRIPT := rock-pi-s
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UBOOT_DEVICE_NAME := rock-pi-s-rk3308
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DEVICE_PACKAGES := kmod-usb-net-cdc-ncm kmod-usb-net-rndis
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endef
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TARGET_DEVICES += radxa_rock-pi-s
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define Device/sinovoip_bpi-r2-pro
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DEVICE_VENDOR := Sinovoip
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DEVICE_MODEL := Bananapi-R2 Pro
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7
target/linux/rockchip/image/rock-pi-s.bootscript
Normal file
7
target/linux/rockchip/image/rock-pi-s.bootscript
Normal file
@ -0,0 +1,7 @@
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part uuid ${devtype} ${devnum}:2 uuid
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setenv bootargs "console=ttyS0,1500000 earlycon=uart8250,mmio32,0xff0a0000 root=PARTUUID=${uuid} rw rootwait";
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load ${devtype} ${devnum}:1 ${kernel_addr_r} kernel.img
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bootm ${kernel_addr_r}
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@ -0,0 +1,84 @@
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From c45de75d7a9ab44a15dedc7a121d6371d6891301 Mon Sep 17 00:00:00 2001
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From: Trevor Woerner <twoerner@gmail.com>
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Date: Mon, 20 Nov 2023 11:22:32 -0500
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Subject: [PATCH] arm64: dts: rockchip: add gpio-line-names to rk3308-rock-pi-s
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Add names to the pins of the general-purpose expansion header as given in the
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Radxa GPIO page[1] following the conventions in the kernel documentation[2] to
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make it easier for users to correlate the pins with functions when using
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utilities such as gpioinfo.
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[1] https://wiki.radxa.com/RockpiS/hardware/gpio
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[2] Documentation/devicetree/bindings/gpio/gpio.txt
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Signed-off-by: Trevor Woerner <twoerner@gmail.com>
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Link: https://lore.kernel.org/r/20231120162232.27653-1-twoerner@gmail.com
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Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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---
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.../boot/dts/rockchip/rk3308-rock-pi-s.dts | 58 +++++++++++++++++++
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1 file changed, 58 insertions(+)
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--- a/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts
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+++ b/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts
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@@ -258,3 +258,61 @@
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&wdt {
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status = "okay";
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};
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+
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+&gpio0 {
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+ gpio-line-names =
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+ /* GPIO0_A0 - A7 */
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+ "", "", "", "", "", "", "", "",
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+ /* GPIO0_B0 - B7 */
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+ "", "", "", "header1-pin3 [GPIO0_B3]", "header1-pin5 [GPIO0_B4]",
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+ "", "", "header1-pin11 [GPIO0_B7]",
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+ /* GPIO0_C0 - C7 */
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+ "header1-pin13 [GPIO0_C0]", "header1-pin15 [GPIO0_C1]", "", "", "",
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+ "", "", "",
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+ /* GPIO0_D0 - D8 */
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+ "", "", "", "", "", "", "", "";
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+};
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+
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+&gpio1 {
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+ gpio-line-names =
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+ /* GPIO1_A0 - A7 */
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+ "", "", "", "", "", "", "", "",
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+ /* GPIO1_B0 - B7 */
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+ "", "", "", "", "", "", "", "",
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+ /* GPIO1_C0 - C7 */
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+ "", "", "", "", "", "", "header1-pin21 [GPIO1_C6]",
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+ "header1-pin19 [GPIO1_C7]",
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+ /* GPIO1_D0 - D8 */
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+ "header1-pin23 [GPIO1_D0]", "header1-pin24 [GPIO1_D1]", "", "", "",
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+ "", "", "";
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+};
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+
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+&gpio2 {
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+ gpio-line-names =
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+ /* GPIO2_A0 - A7 */
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+ "header1-pin10 [GPIO2_A0]", "header1-pin8 [GPIO2_A1]", "", "",
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+ "header1-pin7 [GPIO2_A4]", "header1-pin12 [GPIO2_A5]",
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+ "header2-pin46 [GPIO2_A6]", "header1-pin22 [GPIO1_A7]",
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+ /* GPIO2_B0 - B7 */
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+ "header2-pin45 [GPIO2_B0]", "header1-pin18 [GPIO2_B1]",
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+ "header1-pin16 [GPIO2_B2]", "header2-pin44 [GPIO2_B3]",
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+ "header2-pin43 [GPIO2_B4]", "header2-pin28 [GPIO2_B5]",
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+ "header2-pin30 [GPIO2_B6]", "header2-pin32 [GPIO2_B7]",
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+ /* GPIO2_C0 - C7 */
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+ "header2-pin34 [GPIO2_C0]", "", "", "", "", "", "", "",
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+ /* GPIO2_D0 - D8 */
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+ "", "", "", "", "", "", "", "";
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+};
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+
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+&gpio3 {
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+ gpio-line-names =
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+ /* GPIO3_A0 - A7 */
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+ "", "", "", "", "", "", "", "",
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+ /* GPIO3_B0 - B7 */
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+ "", "", "header2-pin42 [GPIO3_B2]", "header2-pin41 [GPIO3_B3]",
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+ "header2-pin40 [GPIO3_B4]", "header2-pin39 [GPIO3_B5]", "", "",
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+ /* GPIO3_C0 - C7 */
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+ "", "", "", "", "", "", "", "",
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+ /* GPIO3_D0 - D8 */
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+ "", "", "", "", "", "", "", "";
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+};
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@ -0,0 +1,152 @@
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From 085021cc825ed90a6ddc4406f608fb8a85745f81 Mon Sep 17 00:00:00 2001
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From: Trevor Woerner <twoerner@gmail.com>
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Date: Tue, 19 Dec 2023 12:38:13 -0500
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Subject: [PATCH] arm64: dts: rockchip: rk3308-rock-pi-s gpio-line-names
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cleanup
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Perform the following cleanups on a previous patch:
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- indent lines after "gpio-line-names"
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- fix D0-D8 -> D0-D7
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- sort phandle references
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Fixes: c45de75d7a9a ("arm64: dts: rockchip: add gpio-line-names to rk3308-rock-pi-s")
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Signed-off-by: Trevor Woerner <twoerner@gmail.com>
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Link: https://lore.kernel.org/r/20231219173814.1569-1-twoerner@gmail.com
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Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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---
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.../boot/dts/rockchip/rk3308-rock-pi-s.dts | 120 +++++++++---------
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1 file changed, 62 insertions(+), 58 deletions(-)
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--- a/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts
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+++ b/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts
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@@ -151,6 +151,68 @@
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status = "okay";
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};
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+&gpio0 {
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+ gpio-line-names =
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+ /* GPIO0_A0 - A7 */
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+ "", "", "", "", "", "", "", "",
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+ /* GPIO0_B0 - B7 */
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+ "", "", "", "header1-pin3 [GPIO0_B3]",
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+ "header1-pin5 [GPIO0_B4]", "", "",
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+ "header1-pin11 [GPIO0_B7]",
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+ /* GPIO0_C0 - C7 */
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+ "header1-pin13 [GPIO0_C0]",
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+ "header1-pin15 [GPIO0_C1]", "", "", "",
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+ "", "", "",
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+ /* GPIO0_D0 - D7 */
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+ "", "", "", "", "", "", "", "";
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+};
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+
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+&gpio1 {
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+ gpio-line-names =
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+ /* GPIO1_A0 - A7 */
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+ "", "", "", "", "", "", "", "",
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+ /* GPIO1_B0 - B7 */
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+ "", "", "", "", "", "", "", "",
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+ /* GPIO1_C0 - C7 */
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+ "", "", "", "", "", "", "header1-pin21 [GPIO1_C6]",
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+ "header1-pin19 [GPIO1_C7]",
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+ /* GPIO1_D0 - D7 */
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+ "header1-pin23 [GPIO1_D0]", "header1-pin24 [GPIO1_D1]",
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+ "", "", "", "", "", "";
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+};
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+
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+&gpio2 {
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+ gpio-line-names =
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+ /* GPIO2_A0 - A7 */
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+ "header1-pin10 [GPIO2_A0]", "header1-pin8 [GPIO2_A1]",
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+ "", "",
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+ "header1-pin7 [GPIO2_A4]", "header1-pin12 [GPIO2_A5]",
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+ "header2-pin46 [GPIO2_A6]", "header1-pin22 [GPIO1_A7]",
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+ /* GPIO2_B0 - B7 */
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+ "header2-pin45 [GPIO2_B0]", "header1-pin18 [GPIO2_B1]",
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+ "header1-pin16 [GPIO2_B2]", "header2-pin44 [GPIO2_B3]",
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+ "header2-pin43 [GPIO2_B4]", "header2-pin28 [GPIO2_B5]",
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+ "header2-pin30 [GPIO2_B6]", "header2-pin32 [GPIO2_B7]",
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+ /* GPIO2_C0 - C7 */
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+ "header2-pin34 [GPIO2_C0]", "", "", "", "", "", "", "",
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+ /* GPIO2_D0 - D7 */
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+ "", "", "", "", "", "", "", "";
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+};
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+
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+&gpio3 {
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+ gpio-line-names =
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+ /* GPIO3_A0 - A7 */
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+ "", "", "", "", "", "", "", "",
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+ /* GPIO3_B0 - B7 */
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+ "", "", "header2-pin42 [GPIO3_B2]",
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+ "header2-pin41 [GPIO3_B3]", "header2-pin40 [GPIO3_B4]",
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+ "header2-pin39 [GPIO3_B5]", "", "",
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+ /* GPIO3_C0 - C7 */
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+ "", "", "", "", "", "", "", "",
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+ /* GPIO3_D0 - D7 */
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+ "", "", "", "", "", "", "", "";
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+};
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+
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&i2c1 {
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status = "okay";
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};
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@@ -258,61 +320,3 @@
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&wdt {
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status = "okay";
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};
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-
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-&gpio0 {
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- gpio-line-names =
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- /* GPIO0_A0 - A7 */
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- "", "", "", "", "", "", "", "",
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- /* GPIO0_B0 - B7 */
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- "", "", "", "header1-pin3 [GPIO0_B3]", "header1-pin5 [GPIO0_B4]",
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- "", "", "header1-pin11 [GPIO0_B7]",
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- /* GPIO0_C0 - C7 */
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- "header1-pin13 [GPIO0_C0]", "header1-pin15 [GPIO0_C1]", "", "", "",
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- "", "", "",
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- /* GPIO0_D0 - D8 */
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- "", "", "", "", "", "", "", "";
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-};
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-
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-&gpio1 {
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- gpio-line-names =
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- /* GPIO1_A0 - A7 */
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- "", "", "", "", "", "", "", "",
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- /* GPIO1_B0 - B7 */
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- "", "", "", "", "", "", "", "",
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- /* GPIO1_C0 - C7 */
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- "", "", "", "", "", "", "header1-pin21 [GPIO1_C6]",
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- "header1-pin19 [GPIO1_C7]",
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- /* GPIO1_D0 - D8 */
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- "header1-pin23 [GPIO1_D0]", "header1-pin24 [GPIO1_D1]", "", "", "",
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- "", "", "";
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-};
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-
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-&gpio2 {
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- gpio-line-names =
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- /* GPIO2_A0 - A7 */
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- "header1-pin10 [GPIO2_A0]", "header1-pin8 [GPIO2_A1]", "", "",
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- "header1-pin7 [GPIO2_A4]", "header1-pin12 [GPIO2_A5]",
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- "header2-pin46 [GPIO2_A6]", "header1-pin22 [GPIO1_A7]",
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- /* GPIO2_B0 - B7 */
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- "header2-pin45 [GPIO2_B0]", "header1-pin18 [GPIO2_B1]",
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- "header1-pin16 [GPIO2_B2]", "header2-pin44 [GPIO2_B3]",
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- "header2-pin43 [GPIO2_B4]", "header2-pin28 [GPIO2_B5]",
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- "header2-pin30 [GPIO2_B6]", "header2-pin32 [GPIO2_B7]",
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- /* GPIO2_C0 - C7 */
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- "header2-pin34 [GPIO2_C0]", "", "", "", "", "", "", "",
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- /* GPIO2_D0 - D8 */
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- "", "", "", "", "", "", "", "";
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-};
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-
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-&gpio3 {
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- gpio-line-names =
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- /* GPIO3_A0 - A7 */
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- "", "", "", "", "", "", "", "",
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- /* GPIO3_B0 - B7 */
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- "", "", "header2-pin42 [GPIO3_B2]", "header2-pin41 [GPIO3_B3]",
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- "header2-pin40 [GPIO3_B4]", "header2-pin39 [GPIO3_B5]", "", "",
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- /* GPIO3_C0 - C7 */
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- "", "", "", "", "", "", "", "",
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- /* GPIO3_D0 - D8 */
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- "", "", "", "", "", "", "", "";
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-};
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@ -0,0 +1,32 @@
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From fc0daeccc384233eadfa9d5ddbd00159653c6bdc Mon Sep 17 00:00:00 2001
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From: Jonas Karlman <jonas@kwiboo.se>
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Date: Tue, 21 May 2024 21:10:07 +0000
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Subject: [PATCH] arm64: dts: rockchip: Add sdmmc related properties on
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rk3308-rock-pi-s
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Add cap-mmc-highspeed to allow use of high speed MMC mode using an eMMC
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to uSD board. Use disable-wp to signal that no physical write-protect
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line is present. Also add vcc_io used for card and IO line power as
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vmmc-supply.
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Fixes: 2e04c25b1320 ("arm64: dts: rockchip: add ROCK Pi S DTS support")
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Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
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Link: https://lore.kernel.org/r/20240521211029.1236094-5-jonas@kwiboo.se
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Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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---
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arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts | 3 +++
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1 file changed, 3 insertions(+)
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--- a/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts
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+++ b/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts
|
||||
@@ -272,7 +272,10 @@
|
||||
};
|
||||
|
||||
&sdmmc {
|
||||
+ cap-mmc-highspeed;
|
||||
cap-sd-highspeed;
|
||||
+ disable-wp;
|
||||
+ vmmc-supply = <&vcc_io>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
@ -0,0 +1,31 @@
|
||||
From 7affb86ef62581e3475ce3e0a7640da1f2ee29f8 Mon Sep 17 00:00:00 2001
|
||||
From: Jonas Karlman <jonas@kwiboo.se>
|
||||
Date: Tue, 21 May 2024 21:10:08 +0000
|
||||
Subject: [PATCH] arm64: dts: rockchip: Add pinctrl for UART0 to
|
||||
rk3308-rock-pi-s
|
||||
|
||||
UAR0 CTS/RTS is not wired to any pin and is not used for the default
|
||||
serial console use of UART0 on ROCK Pi S.
|
||||
|
||||
Override the SoC defined pinctrl props to limit configuration of the
|
||||
two xfer pins wired to one of the GPIO pin headers.
|
||||
|
||||
Fixes: 2e04c25b1320 ("arm64: dts: rockchip: add ROCK Pi S DTS support")
|
||||
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
|
||||
Link: https://lore.kernel.org/r/20240521211029.1236094-6-jonas@kwiboo.se
|
||||
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
|
||||
---
|
||||
arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts | 2 ++
|
||||
1 file changed, 2 insertions(+)
|
||||
|
||||
--- a/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts
|
||||
+++ b/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts
|
||||
@@ -294,6 +294,8 @@
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&uart0_xfer>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
@ -0,0 +1,61 @@
|
||||
From 4b64ed510ed946a4e4ca6d51d6512bf5361f6a04 Mon Sep 17 00:00:00 2001
|
||||
From: Jonas Karlman <jonas@kwiboo.se>
|
||||
Date: Tue, 21 May 2024 21:10:10 +0000
|
||||
Subject: [PATCH] arm64: dts: rockchip: Add mdio and ethernet-phy nodes to
|
||||
rk3308-rock-pi-s
|
||||
|
||||
Be explicit about the Ethernet port and define mdio and ethernet-phy
|
||||
nodes in the device tree for ROCK Pi S.
|
||||
|
||||
Fixes: bc3753aed81f ("arm64: dts: rockchip: rock-pi-s add more peripherals")
|
||||
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
|
||||
Link: https://lore.kernel.org/r/20240521211029.1236094-8-jonas@kwiboo.se
|
||||
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
|
||||
---
|
||||
.../boot/dts/rockchip/rk3308-rock-pi-s.dts | 26 ++++++++++++++++---
|
||||
1 file changed, 23 insertions(+), 3 deletions(-)
|
||||
|
||||
--- a/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts
|
||||
+++ b/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts
|
||||
@@ -144,11 +144,25 @@
|
||||
|
||||
&gmac {
|
||||
clock_in_out = "output";
|
||||
+ phy-handle = <&rtl8201f>;
|
||||
phy-supply = <&vcc_io>;
|
||||
- snps,reset-gpio = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>;
|
||||
- snps,reset-active-low;
|
||||
- snps,reset-delays-us = <0 50000 50000>;
|
||||
status = "okay";
|
||||
+
|
||||
+ mdio {
|
||||
+ compatible = "snps,dwmac-mdio";
|
||||
+ #address-cells = <1>;
|
||||
+ #size-cells = <0>;
|
||||
+
|
||||
+ rtl8201f: ethernet-phy@1 {
|
||||
+ compatible = "ethernet-phy-ieee802.3-c22";
|
||||
+ reg = <1>;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&mac_rst>;
|
||||
+ reset-assert-us = <20000>;
|
||||
+ reset-deassert-us = <50000>;
|
||||
+ reset-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>;
|
||||
+ };
|
||||
+ };
|
||||
};
|
||||
|
||||
&gpio0 {
|
||||
@@ -221,6 +235,12 @@
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&rtc_32k>;
|
||||
|
||||
+ gmac {
|
||||
+ mac_rst: mac-rst {
|
||||
+ rockchip,pins = <0 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
leds {
|
||||
green_led: green-led {
|
||||
rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
@ -0,0 +1,38 @@
|
||||
--- a/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts
|
||||
+++ b/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts
|
||||
@@ -17,6 +17,10 @@
|
||||
ethernet0 = &gmac;
|
||||
mmc0 = &emmc;
|
||||
mmc1 = &sdmmc;
|
||||
+ led-boot = &blue_led;
|
||||
+ led-failsafe = &blue_led;
|
||||
+ led-running = &blue_led;
|
||||
+ led-upgrade = &blue_led;
|
||||
};
|
||||
|
||||
chosen {
|
||||
@@ -28,22 +32,19 @@
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&green_led>, <&heartbeat_led>;
|
||||
|
||||
- green-led {
|
||||
+ led-0 {
|
||||
color = <LED_COLOR_ID_GREEN>;
|
||||
default-state = "on";
|
||||
function = LED_FUNCTION_POWER;
|
||||
gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
|
||||
- label = "rockpis:green:power";
|
||||
linux,default-trigger = "default-on";
|
||||
};
|
||||
|
||||
- blue-led {
|
||||
+ blue_led: led-1 {
|
||||
color = <LED_COLOR_ID_BLUE>;
|
||||
default-state = "on";
|
||||
function = LED_FUNCTION_HEARTBEAT;
|
||||
gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
|
||||
- label = "rockpis:blue:user";
|
||||
- linux,default-trigger = "heartbeat";
|
||||
};
|
||||
};
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user