Resneptacle/openwrt-cghmn-mt300n
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

realtek: 6.6: set phylink supported_interfaces

Browse Source 
The supported_interfaces bitmap cannot be empty since mainline kernel
commit de5c9bf40c45 ("net: phylink: require supported_interfaces to
be filled"). Fix the dsa and ethernet driver accordingly.

Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
This commit is contained in:
Markus Stockhausen 2024-08-22 02:01:30 -04:00 committed by Sander Vanheule
parent 3772cc7ebe
commit 9f8570b0dd
2 changed files with 18 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

17
target/linux/realtek/files-6.6/drivers/net/dsa/rtl83xx/dsa.c
View File

@ -652,6 +652,21 @@ static void rtl83xx_config_interface(int port, phy_interface_t interface)
pr_debug("configured port %d for interface %s\n", port, phy_modes(interface)); pr_debug("configured port %d for interface %s\n", port, phy_modes(interface));
} }
static void rtl83xx_phylink_get_caps(struct dsa_switch *ds, int port,
struct phylink_config *config)
{
/*
* This capability check will need some love. Depending on the model and the port
* different link modes are supported. For now just enable all required values
* so that we can make use of the ports.
*/
__set_bit(PHY_INTERFACE_MODE_INTERNAL, config->supported_interfaces);
__set_bit(PHY_INTERFACE_MODE_GMII, config->supported_interfaces);
__set_bit(PHY_INTERFACE_MODE_QSGMII, config->supported_interfaces);
__set_bit(PHY_INTERFACE_MODE_SGMII, config->supported_interfaces);
__set_bit(PHY_INTERFACE_MODE_1000BASEX, config->supported_interfaces);
}
static void rtl83xx_phylink_mac_config(struct dsa_switch *ds, int port, static void rtl83xx_phylink_mac_config(struct dsa_switch *ds, int port,
unsigned int mode, unsigned int mode,
const struct phylink_link_state *state) const struct phylink_link_state *state)
@ -2170,6 +2185,7 @@ const struct dsa_switch_ops rtl83xx_switch_ops = {
.phy_read = dsa_phy_read, .phy_read = dsa_phy_read,
.phy_write = dsa_phy_write, .phy_write = dsa_phy_write,
.phylink_get_caps = rtl83xx_phylink_get_caps,
.phylink_mac_config = rtl83xx_phylink_mac_config, .phylink_mac_config = rtl83xx_phylink_mac_config,
.phylink_mac_link_down = rtl83xx_phylink_mac_link_down, .phylink_mac_link_down = rtl83xx_phylink_mac_link_down,
.phylink_mac_link_up = rtl83xx_phylink_mac_link_up, .phylink_mac_link_up = rtl83xx_phylink_mac_link_up,
@ -2227,6 +2243,7 @@ const struct dsa_switch_ops rtl930x_switch_ops = {
.phy_read = dsa_phy_read, .phy_read = dsa_phy_read,
.phy_write = dsa_phy_write, .phy_write = dsa_phy_write,
.phylink_get_caps = rtl83xx_phylink_get_caps,
.phylink_mac_config = rtl93xx_phylink_mac_config, .phylink_mac_config = rtl93xx_phylink_mac_config,
.phylink_mac_link_down = rtl93xx_phylink_mac_link_down, .phylink_mac_link_down = rtl93xx_phylink_mac_link_down,
.phylink_mac_link_up = rtl93xx_phylink_mac_link_up, .phylink_mac_link_up = rtl93xx_phylink_mac_link_up,

1
target/linux/realtek/files-6.6/drivers/net/ethernet/rtl838x_eth.c
View File

@ -2642,6 +2642,7 @@ static int __init rtl838x_eth_probe(struct platform_device *pdev)
priv->pcs.ops = &rtl838x_pcs_ops; priv->pcs.ops = &rtl838x_pcs_ops;
priv->phylink_config.dev = &dev->dev; priv->phylink_config.dev = &dev->dev;
priv->phylink_config.type = PHYLINK_NETDEV; priv->phylink_config.type = PHYLINK_NETDEV;
__set_bit(PHY_INTERFACE_MODE_INTERNAL, priv->phylink_config.supported_interfaces);
phylink = phylink_create(&priv->phylink_config, pdev->dev.fwnode, phylink = phylink_create(&priv->phylink_config, pdev->dev.fwnode,
phy_mode, &rtl838x_phylink_ops); phy_mode, &rtl838x_phylink_ops);