Resneptacle/openwrt-cghmn-mt300n
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ramips: gl-mt1300: downclock SPI to 50MHz

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The SPI max frequency was set to 80MHz, considerably higher than the
vendor clocks it in their firmware (10MHz).  Multiple users reported
jffs2 corruption/instability in GitHub issue #10461.

My unit has a W25Q256; datasheet specifies maximum SPI frequency for
read command of 50MHz.

Thanks to @DragonBlueP for suggesting to eliminate m25p,fast-read;
and @MPannen1979 for identifying the problem.

Fixes: #10461
Signed-off-by: Michael Lyle <mlyle@lyle.org>
(cherry picked from commit 961e01fc67e7d9e60557df3474fa326216aa4839)
This commit is contained in:
Michael Lyle 2022-10-29 21:00:41 -07:00 committed by Hauke Mehrtens
parent ca124d2e4b
commit 9155d40513
1 changed files with 1 additions and 2 deletions
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3
target/linux/ramips/dts/mt7621_glinet_gl-mt1300.dts
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@ -67,8 +67,7 @@
flash@0 { flash@0 {
compatible = "jedec,spi-nor"; compatible = "jedec,spi-nor";
reg = <0>; reg = <0>;
spi-max-frequency = <80000000>; spi-max-frequency = <50000000>;
m25p,fast-read;
broken-flash-reset; broken-flash-reset;
partitions { partitions {