// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
 * Copyright (c) 2021, Flole <flole@flole.de>
 * Copyright (c) 2023, Andrew Smith <gul.code@outlook.com>
 */

/dts-v1/;

#include "ipq8074.dtsi"
#include "ipq8074-ess.dtsi"
#include "ipq8074-hk-cpu.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>

/ {
	aliases {
		serial0 = &blsp1_uart5;
		led-boot = &led_front_blue;
		led-failsafe = &led_front_red;
		led-running = &led_front_green;
		led-upgrade = &led_front_white;
		label-mac-device = &dp2;
	};

	chosen {
		stdout-path = "serial0:115200n8";
		bootargs-append = " ubi.mtd=rootfs root=/dev/ubiblock0_0";
	};

	keys {
		compatible = "gpio-keys";

		reset {
			label = "reset";
			gpios = <&tlmm 54 GPIO_ACTIVE_LOW>;
			linux,code = <KEY_RESTART>;
		};

		wps {
			label = "wps";
			gpios = <&tlmm 57 GPIO_ACTIVE_LOW>;
			linux,code = <KEY_WPS_BUTTON>;
		};
	};

	leds {
		compatible = "gpio-leds";

		led_front_blue: front-blue {
			function = LED_FUNCTION_STATUS;
			gpios = <&tlmm 33 GPIO_ACTIVE_LOW>;
			color = <LED_COLOR_ID_BLUE>;
		};

		led_front_green: front-green {
			function = LED_FUNCTION_STATUS;
			gpios = <&tlmm 29 GPIO_ACTIVE_LOW>;
			color = <LED_COLOR_ID_GREEN>;
		};

		led_front_red: front-red {
			function = LED_FUNCTION_STATUS;
			gpios = <&tlmm 31 GPIO_ACTIVE_LOW>;
			color = <LED_COLOR_ID_RED>;
		};

		led_front_white: front-white {
			function = LED_FUNCTION_STATUS;
			gpios = <&tlmm 26 GPIO_ACTIVE_LOW>;
			color = <LED_COLOR_ID_WHITE>;
		};

		led_power_green: power-green {
			function = LED_FUNCTION_POWER;
			gpios = <&tlmm 21 GPIO_ACTIVE_LOW>;
			color = <LED_COLOR_ID_GREEN>;
			default-state = "on";
		};

		led_power_red: power-red {
			function = LED_FUNCTION_POWER;
			gpios = <&tlmm 22 GPIO_ACTIVE_LOW>;
			color = <LED_COLOR_ID_RED>;
			panic-indicator;
		};
	};
};

&tlmm {
	mdio_pins: mdio-pins {
		mdc {
			pins = "gpio68";
			function = "mdc";
			drive-strength = <8>;
			bias-pull-up;
		};

		mdio {
			pins = "gpio69";
			function = "mdio";
			drive-strength = <8>;
			bias-pull-up;
		};
	};

	leds_pins: leds_pinmux {
		led_power_green {
			pins = "gpio21";
			function = "gpio";
			drive-strength = <8>;
			bias-pull-down;
		};

		led_power_red {
			pins = "gpio22";
			function = "gpio";
			drive-strength = <8>;
			bias-pull-down;
		};

		led_white {
			pins = "gpio26";
			function = "gpio";
			drive-strength = <8>;
			bias-pull-down;
		};

		led_green {
			pins = "gpio29";
			function = "gpio";
			drive-strength = <8>;
			bias-pull-down;
		};

		led_red {
			pins = "gpio31";
			function = "gpio";
			drive-strength = <8>;
			bias-pull-down;
		};

		led_blue {
			pins = "gpio33";
			function = "gpio";
			drive-strength = <8>;
			bias-pull-down;
		};
	};
};

&blsp1_uart5 {
	status = "okay";
};

&blsp1_i2c2 {
	pinctrl-0 = <&i2c_0_pins>;
	pinctrl-names = "default";

	status = "okay";
	
	tlc59208f@27 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "ti,tlc59108";
		reg = <0x27>;
		
		led@0 {
			label = "rgb:led0";
			reg = <0>;
			linux,default-trigger = "default-off";
		};

		led@1 {
			label = "rgb:led1";
			reg = <1>;
			linux,default-trigger = "default-off";
		};

		led@2 {
			label = "rgb:led2";
			reg = <2>;
			linux,default-trigger = "default-off";
		};

		led@3 {
			label = "rgb:led3";
			reg = <3>;
			linux,default-trigger = "default-off";
		};
	};
};

&prng {
	status = "okay";
};

&cryptobam {
	status = "okay";
};

&crypto {
	status = "okay";
};

&qpic_bam {
	status = "okay";
};

&qpic_nand {
	status = "okay";

	/*
	 * Bootloader will find the NAND DT node by the compatible and
	 * then "fixup" it by adding the partitions from the SMEM table
	 * using the legacy bindings thus making it impossible for us
	 * to change the partition table or utilize NVMEM for calibration.
	 * So add a dummy partitions node that bootloader will populate
	 * and set it as disabled so the kernel ignores it instead of
	 * printing warnings due to the broken way bootloader adds the
	 * partitions.
	 */
	partitions {
		status = "disabled";
	};

	nand@0 {
		reg = <0>;
		nand-ecc-strength = <4>;
		nand-ecc-step-size = <512>;
		nand-bus-width = <8>;

		partitions {
			compatible = "fixed-partitions";
			#address-cells = <1>;
			#size-cells = <1>;

			partition@0 {
				label = "0:sbl1";
				reg = <0x00 0x100000>;
				read-only;
			};

			partition@100000 {
				label = "0:mibib";
				reg = <0x100000 0x100000>;
				read-only;
			};

			partition@200000 {
				label = "0:bootconfig";
				reg = <0x200000 0x80000>;
				read-only;
			};

			partition@280000 {
				label = "0:bootconfig_1";
				reg = <0x280000 0x80000>;
				read-only;
			};

			partition@300000 {
				label = "0:qsee";
				reg = <0x300000 0x300000>;
				read-only;
			};

			partition@600000 {
				label = "0:qsee_1";
				reg = <0x600000 0x300000>;
				read-only;
			};

			partition@900000 {
				label = "0:devcfg";
				reg = <0x900000 0x80000>;
				read-only;
			};

			partition@980000 {
				label = "0:devcfg_1";
				reg = <0x980000 0x80000>;
				read-only;
			};

			partition@a00000 {
				label = "0:apdp";
				reg = <0xa00000 0x80000>;
				read-only;
			};

			partition@a80000 {
				label = "0:apdp_1";
				reg = <0xa80000 0x80000>;
				read-only;
			};

			partition@b00000 {
				label = "0:rpm";
				reg = <0xb00000 0x80000>;
				read-only;
			};

			partition@b80000 {
				label = "0:rpm_1";
				reg = <0xb80000 0x80000>;
				read-only;
			};

			partition@c00000 {
				label = "0:cdt";
				reg = <0xc00000 0x80000>;
				read-only;
			};

			partition@c80000 {
				label = "0:cdt_1";
				reg = <0xc80000 0x80000>;
				read-only;
			};

			partition@d00000 {
				label = "0:appsblenv";
				reg = <0xd00000 0x80000>;
			};

			partition@d80000 {
				label = "0:appsbl";
				reg = <0xd80000 0x100000>;
				read-only;
			};

			partition@e80000 {
				label = "0:appsbl_1";
				reg = <0xe80000 0x100000>;
				read-only;
			};

			partition@f80000 {
				label = "0:art";
				reg = <0xf80000 0x80000>;
				read-only;
			};

			partition@1000000 {
				label = "0:art.bak";
				reg = <0x1000000 0x80000>;
				read-only;
			};

			partition@1080000 {
				label = "config";
				reg = <0x1080000 0x100000>;
			};

			partition@1180000 {
				label = "boarddata1";
				reg = <0x1180000 0x100000>;

				nvmem-layout {
					compatible = "fixed-layout";
					#address-cells = <1>;
					#size-cells = <1>;

					macaddr_boarddata1_0: macaddr@0 {
						reg = <0x0 0x6>;
					};

					macaddr_boarddata1_6: macaddr@6 {
						reg = <0x6 0x6>;
					};
				};
			};

			partition@1280000 {
				label = "boarddata2";
				reg = <0x1280000 0x100000>;
			};

			partition@1380000 {
				label = "pot";
				reg = <0x1380000 0x100000>;
				read-only;
			};

			partition@1480000 {
				label = "dnidata";
				reg = <0x1480000 0x500000>;
				read-only;
			};

			partition@1980000 {
				label = "kernel";
				reg = <0x1980000 0x620000>;
			};

			partition@1fa0000 {
				label = "rootfs";
				reg = <0x1fa0000 0x66e0000>;
			};

			partition@8680000 {
				label = "kernel2";
				reg = <0x8680000 0x620000>;
				read-only;
			};

			partition@8ca0000 {
				label = "rootfs2";
				reg = <0x8ca0000 0x66e0000>;
				read-only;
			};
		};
	};
};

&mdio {
	status = "okay";

	pinctrl-0 = <&mdio_pins>;
	pinctrl-names = "default";
	reset-gpios = <&tlmm 37 GPIO_ACTIVE_LOW>;

	ethernet-phy-package@0 {
		#address-cells = <1>;
		#size-cells = <0>;
		reg = <0>;

		compatible = "qcom,qca8075-package";

		qca8075_1: ethernet-phy@1 {
			compatible = "ethernet-phy-ieee802.3-c22";
			reg = <1>;
		};

		qca8075_2: ethernet-phy@2 {
			compatible = "ethernet-phy-ieee802.3-c22";
			reg = <2>;
		};

		qca8075_3: ethernet-phy@3 {
			compatible = "ethernet-phy-ieee802.3-c22";
			reg = <3>;
		};

		qca8075_4: ethernet-phy@4 {
			compatible = "ethernet-phy-ieee802.3-c22";
			reg = <4>;
		};
	};

	qca8081_28: ethernet-phy@28 {
		compatible = "ethernet-phy-id004d.d101";
		reg = <28>;
		reset-deassert-us = <10000>;
		reset-gpios = <&tlmm 25 GPIO_ACTIVE_LOW>;
	};
};

&switch {
	status = "okay";

	switch_lan_bmp = <(ESS_PORT2 | ESS_PORT3 | ESS_PORT4 | ESS_PORT5)>; /* lan port bitmap */
	switch_wan_bmp = <ESS_PORT6>; /* wan port bitmap */
	switch_mac_mode = <MAC_MODE_PSGMII>; /* mac mode for uniphy instance0*/
	switch_mac_mode2 = <MAC_MODE_SGMII_PLUS>; /* mac mode for uniphy instance2*/

	qcom,port_phyinfo {
		port@2 {
			port_id = <2>;
			phy_address = <1>;
		};
		port@3 {
			port_id = <3>;
			phy_address = <2>;
		};
		port@4 {
			port_id = <4>;
			phy_address = <3>;
		};
		port@5 {
			port_id = <5>;
			phy_address = <4>;
		};
		port@6 {
			port_id = <6>;
			phy_address = <28>;
			port_mac_sel = "QGMAC_PORT";
		};
	};
};

&edma {
	status = "okay";
};

&dp2 {
	status = "okay";
	phy-handle = <&qca8075_1>;
	label = "lan2";
	nvmem-cells = <&macaddr_boarddata1_0>;
	nvmem-cell-names = "mac-address";
};

&dp3 {
	status = "okay";
	phy-handle = <&qca8075_2>;
	label = "lan3";
	nvmem-cells = <&macaddr_boarddata1_0>;
	nvmem-cell-names = "mac-address";
};

&dp4 {
	status = "okay";
	phy-handle = <&qca8075_3>;
	label = "lan4";
	nvmem-cells = <&macaddr_boarddata1_0>;
	nvmem-cell-names = "mac-address";
};

&dp5 {
	status = "okay";
	phy-handle = <&qca8075_4>;
	label = "lan5";
	nvmem-cells = <&macaddr_boarddata1_0>;
	nvmem-cell-names = "mac-address";
};

&dp6 {
	status = "okay";
	phy-handle = <&qca8081_28>;
	label = "wan";
	nvmem-cells = <&macaddr_boarddata1_6>;
	nvmem-cell-names = "mac-address";
};

&wifi {
	status = "okay";

	qcom,ath11k-calibration-variant = "Netgear-SXK80";
};
